[PATCH linux dev-4.10] ARM: dts: aspeed: Add ranges to SCU node

[Rick Altherr]

Reviewed-by: Rick Altherr <raltherr at google.com>

On Thu, Sep 21, 2017 at 12:45 AM, Joel Stanley <joel at jms.id.au> wrote:
> The SCU contains a number of devices. To date we have the pinctrl node,
> which doesn't have a reg property, the out of tree clock drivers which
> do have a single address in their reg properties, and the timeriomem
> node which has an address and length.
>
> From now on we will use a ranges property, allowing all of the devices
> under the SCU to specify an address and size starting from the SCU base.
>
> This allows the timeriomem node to live under the SCU syscon node. This change
> is required to get the timeriomem driver to probe on the ast2400.
>
> Signed-off-by: Joel Stanley <joel at jms.id.au>
> ---
> This supersedes http://patchwork.ozlabs.org/patch/816677/ following discussion
> with Jeremy and Andrew.
>
>  arch/arm/boot/dts/aspeed-g4.dtsi | 21 +++++++++++----------
>  arch/arm/boot/dts/aspeed-g5.dtsi | 31 ++++++++++++++++---------------
>  2 files changed, 27 insertions(+), 25 deletions(-)
>
> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
> index a83b6a8d73d4..6151704aa87e 100644
> --- a/arch/arm/boot/dts/aspeed-g4.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi
> @@ -158,9 +158,14 @@
>                         syscon: syscon at 1e6e2000 {
>                                 compatible = "aspeed,g4-scu", "syscon", "simple-mfd";
>                                 reg = <0x1e6e2000 0x1a8>;
> +                               ranges = <0x0 0x1e6e2000 0x1a8>;
>
>                                 #address-cells = <1>;
> -                               #size-cells = <0>;
> +                               #size-cells = <1>;
> +
> +                               pinctrl: pinctrl at 1e6e2000 {
> +                                       compatible = "aspeed,g4-pinctrl";
> +                               };
>
>                                 clk_clkin: clk_clkin {
>                                         #clock-cells = <0>;
> @@ -171,40 +176,36 @@
>                                 clk_hpll: clk_hpll at 70 {
>                                         #clock-cells = <0>;
>                                         compatible = "aspeed,g4-hpll-clock";
> -                                       reg = <0x70>;
> +                                       reg = <0x70 0x0>;
>                                         clocks = <&clk_clkin>;
>                                 };
>
>                                 clk_ahb: clk_ahb at 70 {
>                                         #clock-cells = <0>;
>                                         compatible = "aspeed,g4-ahb-clock";
> -                                       reg = <0x70>;
> +                                       reg = <0x70 0x0>;
>                                         clocks = <&clk_hpll>;
>                                 };
>
>                                 clk_apb: clk_apb at 08 {
>                                         #clock-cells = <0>;
>                                         compatible = "aspeed,g4-apb-clock";
> -                                       reg = <0x08>;
> +                                       reg = <0x08 0x0>;
>                                         clocks = <&clk_hpll>;
>                                 };
>
>                                 clk_uart: clk_uart at 2c{
>                                         #clock-cells = <0>;
>                                         compatible = "aspeed,g4-uart-clock";
> -                                       reg = <0x2c>;
> +                                       reg = <0x2c 0x0>;
>                                 };
>
>                                 hwrng at 1e6e2078 {
>                                         compatible = "timeriomem_rng";
> -                                       reg = <0x1e6e2078 0x4>;
> +                                       reg = <0x78 0x4>;
>                                         period = <1>;
>                                         quality = <100>;
>                                 };
> -
> -                               pinctrl: pinctrl at 1e6e2000 {
> -                                       compatible = "aspeed,g4-pinctrl";
> -                               };
>                         };
>
>                         adc: adc at 1e6e9000 {
> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
> index 9a988f69e610..ba3607c788e8 100644
> --- a/arch/arm/boot/dts/aspeed-g5.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
> @@ -207,55 +207,56 @@
>                         syscon: syscon at 1e6e2000 {
>                                 compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
>                                 reg = <0x1e6e2000 0x1a8>;
> +                               ranges = <0x0 0x1e6e2000 0x1a8>;
>
>                                 #address-cells = <1>;
> -                               #size-cells = <0>;
> +                               #size-cells = <1>;
> +
> +                               pinctrl: pinctrl at 1e6e2000 {
> +                                       compatible = "aspeed,g5-pinctrl";
> +                               };
>
>                                 clk_clkin: clk_clkin at 70 {
>                                         #clock-cells = <0>;
>                                         compatible = "aspeed,g5-clkin-clock";
> -                                       reg = <0x70>;
> +                                       reg = <0x70 0x0>;
>                                 };
>
>                                 clk_hpll: clk_hpll at 24 {
>                                         #clock-cells = <0>;
>                                         compatible = "aspeed,g5-hpll-clock";
> -                                       reg = <0x24>;
> +                                       reg = <0x24 0x0>;
>                                         clocks = <&clk_clkin>;
>                                 };
>
>                                 clk_ahb: clk_ahb at 70 {
>                                         #clock-cells = <0>;
>                                         compatible = "aspeed,g5-ahb-clock";
> -                                       reg = <0x70>;
> +                                       reg = <0x70 0x0>;
>                                         clocks = <&clk_hpll>;
>                                 };
>
>                                 clk_apb: clk_apb at 08 {
>                                         #clock-cells = <0>;
>                                         compatible = "aspeed,g5-apb-clock";
> -                                       reg = <0x08>;
> +                                       reg = <0x08 0x0>;
>                                         clocks = <&clk_hpll>;
>                                 };
>
>                                 clk_uart: clk_uart at 2c {
>                                         #clock-cells = <0>;
>                                         compatible = "aspeed,g5-uart-clock";
> -                                       reg = <0x2c>;
> +                                       reg = <0x2c 0x0>;
>                                 };
>
> -                               pinctrl: pinctrl at 1e6e2000 {
> -                                       compatible = "aspeed,g5-pinctrl";
> +                               hwrng at 1e6e2078 {
> +                                       compatible = "timeriomem_rng";
> +                                       reg = <0x78 0x4>;
> +                                       period = <1>;
> +                                       quality = <100>;
>                                 };
>                         };
>
> -                       hwrng at 1e6e2078 {
> -                               compatible = "timeriomem_rng";
> -                               reg = <0x1e6e2078 0x4>;
> -                               period = <1>;
> -                               quality = <100>;
> -                       };
> -
>                         gfx: display at 1e6e6000 {
>                                 compatible = "aspeed,ast2500-gfx", "syscon";
>                                 reg = <0x1e6e6000 0x1000>;
> --
> 2.14.1
>