[PATCH linux dev-4.10] ARM: dts: aspeed: gpio controller register range
joel at jms.id.au
Thu Nov 30 14:53:21 AEDT 2017
On Thu, Nov 30, 2017 at 5:03 AM, Patrick Venture <venture at google.com> wrote:
> Can I get a status on this patch? The device datasheet has 4K
> reserved for the range, but only the first 512 are registers
> controlled by this driver. The rest will be handled by a separate
> driver. Or at least that's how it's planned.
+cc the people who have worked on this.
I think that's okay, but lets see what the others have to say.
Do you have a driver for the rest of the GPIOs you can submit? I'd
like to see that code so we can decide if there is good reason to
make that completely separate, and not part of the existing driver.
This work is best done upstream, as you will need to make the same
> On Mon, Nov 20, 2017 at 10:54 AM, Patrick Venture <venture at google.com> wrote:
>> Instead of 4k, it should be 512 because the latter
>> part of the memory region are registers for the serial
>> gpio driver.
>> Signed-off-by: Patrick Venture <venture at google.com>
>> arch/arm/boot/dts/aspeed-g4.dtsi | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
>> index 6505062ac6c7..424d843ec1da 100644
>> --- a/arch/arm/boot/dts/aspeed-g4.dtsi
>> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi
>> @@ -231,7 +231,7 @@
>> #gpio-cells = <2>;
>> compatible = "aspeed,ast2400-gpio";
>> - reg = <0x1e780000 0x1000>;
>> + reg = <0x1e780000 0x200>;
>> interrupts = <20>;
>> gpio-ranges = <&pinctrl 0 0 220>;
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