[PATCH linux dev-4.13 10/23] drivers/watchdog: Add optional ASPEED device tree properties

Andrew Jeffery andrew at aj.id.au
Tue Nov 7 18:30:33 AEDT 2017

From: Christopher Bostic <cbostic at linux.vnet.ibm.com>

Describe device tree optional properties:

  * aspeed,reset-type = "cpu|soc|system|none"
     One of three different, mutually exclusive, values

	"cpu" : ARM CPU reset on signal
	"soc" : 'System on chip' reset
	"system" : Full system reset

     The value can also be set to "none" which indicates that no
     reset of any kind is to be done via this watchdog.  This assumes
     another watchdog on the chip is to take care of resets.

  * aspeed,external-signal - Generate external signal (WDT1 and WDT2 only)
  * aspeed,alt-boot - Boot from alternate block on signal

Signed-off-by: Christopher Bostic <cbostic at linux.vnet.ibm.com>
Acked-by: Rob Herring <robh at kernel.org>
Reviewed-by: Guenter Roeck <linux at roeck-us.net>
Signed-off-by: Guenter Roeck <linux at roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim at iguana.be>
(cherry picked from commit ffbb29d62d6bcca3eff88111b58e4865506e95bf)
Signed-off-by: Andrew Jeffery <andrew at aj.id.au>
 .../devicetree/bindings/watchdog/aspeed-wdt.txt    | 32 ++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
index c5e74d7b4406..2b34ce9b60b9 100644
--- a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
@@ -8,9 +8,41 @@ Required properties:
  - reg: physical base address of the controller and length of memory mapped
+Optional properties:
+ - aspeed,reset-type = "cpu|soc|system|none"
+   Reset behavior - Whenever a timeout occurs the watchdog can be programmed
+   to generate one of three different, mutually exclusive, types of resets.
+   Type "none" can be specified to indicate that no resets are to be done.
+   This is useful in situations where another watchdog engine on chip is
+   to perform the reset.
+   If 'aspeed,reset-type=' is not specfied the default is to enable system
+   reset.
+   Reset types:
+        - cpu: Reset CPU on watchdog timeout
+        - soc: Reset 'System on Chip' on watchdog timeout
+        - system: Reset system on watchdog timeout
+        - none: No reset is performed on timeout. Assumes another watchdog
+                engine is responsible for this.
+ - aspeed,external-signal: If property is present then signal is sent to
+			external reset counter (only WDT1 and WDT2). If not
+			specified no external signal is sent.
+ - aspeed,alt-boot:    If property is present then boot from alternate block.
 	wdt1: watchdog at 1e785000 {
 		compatible = "aspeed,ast2400-wdt";
 		reg = <0x1e785000 0x1c>;
+		aspeed,reset-type = "system";
+		aspeed,external-signal;

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