[PATCH linux dev-4.10 v3] arm: dts: aspeed: Add missing clock sources for barreleye
Eddie James
eajames at linux.vnet.ibm.com
Sat May 27 01:54:53 AEST 2017
From: "Edward A. James" <eajames at us.ibm.com>
Reorganize flash controllers into the ast2400 config and edit all the
ast2400 machine configs. Barreleye wasn't booting with the new
aspeed-smc driver.
Signed-off-by: Edward A. James <eajames at us.ibm.com>
---
arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts | 44 ++++++++--------------
arch/arm/boot/dts/aspeed-bmc-opp-firestone.dts | 37 ++++++------------
arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts | 45 ++++++----------------
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 52 ++++++++------------------
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts | 38 ++++++-------------
arch/arm/boot/dts/aspeed-g4.dtsi | 34 +++++++++++++++++
6 files changed, 102 insertions(+), 148 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts b/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts
index be1f2d1..7a616bb 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts
@@ -31,34 +31,6 @@
};
};
- ahb {
- bmc_pnor: fmc at 1e620000 {
- reg = < 0x1e620000 0x94
- 0x20000000 0x02000000 >;
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "aspeed,ast2400-fmc";
- flash at 0 {
- reg = < 0 >;
- compatible = "jedec,spi-nor" ;
-#include "aspeed-bmc-opp-flash-layout.dtsi"
- };
- };
-
- host_pnor: spi at 1e630000 {
- reg = < 0x1e630000 0x18
- 0x30000000 0x02000000 >;
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "aspeed,ast2400-spi";
- flash at 0 {
- reg = < 0 >;
- compatible = "jedec,spi-nor" ;
- label = "pnor";
- };
- };
- };
-
leds {
compatible = "gpio-leds";
@@ -76,6 +48,22 @@
};
};
+&bmc_pnor {
+ status = "okay";
+ flash at 0 {
+ status = "okay";
+ m25p,fast-read;
+#include "aspeed-bmc-opp-flash-layout.dtsi"
+ };
+};
+
+&host_pnor {
+ flash at 0 {
+ status = "okay";
+ m25p,fast-read;
+ };
+};
+
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flbusy_default &pinctrl_flwp_default
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-firestone.dts b/arch/arm/boot/dts/aspeed-bmc-opp-firestone.dts
index fe63621..46684db 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-firestone.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-firestone.dts
@@ -50,34 +50,21 @@
gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
};
};
+};
- ahb {
- fmc at 1e620000 {
- reg = < 0x1e620000 0x94
- 0x20000000 0x02000000 >;
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "aspeed,ast2400-fmc";
-
- flash at 0 {
- reg = < 0 >;
- compatible = "jedec,spi-nor" ;
+&bmc_pnor {
+ status = "okay";
+ flash at 0 {
+ status = "okay";
+ m25p,fast-read;
#include "aspeed-bmc-opp-flash-layout.dtsi"
- };
- };
+ };
+};
- spi at 1e630000 {
- reg = < 0x1e630000 0x18
- 0x30000000 0x02000000 >;
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "aspeed,ast2400-spi";
- flash at 0 {
- reg = < 0 >;
- compatible = "jedec,spi-nor" ;
- label = "pnor";
- };
- };
+&host_pnor {
+ flash at 0 {
+ status = "okay";
+ m25p,fast-read;
};
};
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts b/arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts
index 121612a..8ab53fd 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts
@@ -30,42 +30,21 @@
reg = <0x5f000000 0x01000000>; /* 16MB */
};
};
+};
- ahb {
-
- bmc_pnor: fmc at 1e620000 {
- reg = < 0x1e620000 0x94
- 0x20000000 0x02000000 >;
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "aspeed,ast2400-fmc";
- aspeed,fmc-has-dma;
- interrupts = <19>;
- clocks = <&clk_ahb>;
- clock-names = "ahb";
- flash at 0 {
- reg = < 0 >;
- compatible = "jedec,spi-nor" ;
- m25p,fast-read;
+&bmc_pnor {
+ status = "okay";
+ flash at 0 {
+ status = "okay";
+ m25p,fast-read;
#include "aspeed-bmc-opp-flash-layout.dtsi"
- };
- };
+ };
+};
- host_pnor: spi at 1e630000 {
- reg = < 0x1e630000 0x18
- 0x30000000 0x02000000 >;
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "aspeed,ast2400-spi";
- clocks = <&clk_ahb>;
- clock-names = "ahb";
- flash {
- reg = < 0 >;
- compatible = "jedec,spi-nor" ;
- label = "pnor";
- m25p,fast-read;
- };
- };
+&host_pnor {
+ flash at 0 {
+ status = "okay";
+ m25p,fast-read;
};
};
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
index b4faa1d..e55abe6 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
@@ -47,42 +47,6 @@
};
};
- ahb {
- bmc_pnor: fmc at 1e620000 {
- reg = < 0x1e620000 0x94
- 0x20000000 0x02000000 >;
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "aspeed,ast2400-fmc";
- aspeed,fmc-has-dma;
- interrupts = <19>;
- clocks = <&clk_ahb>;
- clock-names = "ahb";
- flash at 0 {
- reg = < 0 >;
- compatible = "jedec,spi-nor" ;
- m25p,fast-read;
-#include "aspeed-bmc-opp-flash-layout.dtsi"
- };
- };
-
- host_pnor: spi at 1e630000 {
- reg = < 0x1e630000 0x18
- 0x30000000 0x02000000 >;
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "aspeed,ast2400-spi";
- clocks = <&clk_ahb>;
- clock-names = "ahb";
- flash {
- reg = < 0 >;
- compatible = "jedec,spi-nor" ;
- label = "pnor";
- m25p,fast-read;
- };
- };
- };
-
gpio-fsi {
compatible = "fsi-master-gpio", "fsi-master";
@@ -94,6 +58,22 @@
};
};
+&bmc_pnor {
+ status = "okay";
+ flash at 0 {
+ status = "okay";
+ m25p,fast-read;
+#include "aspeed-bmc-opp-flash-layout.dtsi"
+ };
+};
+
+&host_pnor {
+ flash at 0 {
+ status = "okay";
+ m25p,fast-read;
+ };
+};
+
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flbusy_default &pinctrl_flwp_default
diff --git a/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
index 7132460..5cd7029 100644
--- a/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
@@ -30,35 +30,21 @@
reg = <0x47800000 0x00800000>; /* 8MB */
};
};
+};
- ahb {
- bmc_pnor: fmc at 1e620000 {
- reg = < 0x1e620000 0x94
- 0x20000000 0x02000000 >;
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "aspeed,ast2400-fmc";
- aspeed,fmc-has-dma;
- interrupts = <19>;
- flash at 0 {
- reg = < 0 >;
- compatible = "jedec,spi-nor" ;
+&bmc_pnor {
+ status = "okay";
+ flash at 0 {
+ status = "okay";
+ m25p,fast-read;
#include "aspeed-bmc-opp-flash-layout.dtsi"
- };
- };
+ };
+};
- host_pnor: spi at 1e630000 {
- reg = < 0x1e630000 0x18
- 0x30000000 0x01000000 >;
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "aspeed,ast2400-smc";
- flash {
- reg = < 0 >;
- compatible = "jedec,spi-nor" ;
- label = "pnor";
- };
- };
+&host_pnor {
+ flash at 0 {
+ status = "okay";
+ m25p,fast-read;
};
};
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index d8827d5..9fb7889 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -44,6 +44,40 @@
#size-cells = <1>;
ranges;
+ bmc_pnor: fmc at 1e620000 {
+ reg = < 0x1e620000 0x94
+ 0x20000000 0x02000000 >;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "aspeed,ast2400-fmc";
+ status = "disabled";
+ aspeed,fmc-has-dma;
+ interrupts = <19>;
+ clocks = <&clk_ahb>;
+ clock-names = "ahb";
+ flash at 0 {
+ reg = < 0 >;
+ compatible = "jedec,spi-nor" ;
+ status = "disabled";
+ };
+ };
+
+ host_pnor: spi at 1e630000 {
+ reg = < 0x1e630000 0x18
+ 0x30000000 0x02000000 >;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "aspeed,ast2400-spi";
+ status = "disabled";
+ clocks = <&clk_ahb>;
+ clock-names = "ahb";
+ flash at 0 {
+ reg = < 0 >;
+ compatible = "jedec,spi-nor" ;
+ status = "disabled";
+ };
+ };
+
vic: interrupt-controller at 1e6c0080 {
compatible = "aspeed,ast2400-vic";
interrupt-controller;
--
1.8.3.1
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