[PATCH linux dev-4.10 v2] arm: dts: aspeed: Add missing clock sources for barreleye
Cédric Le Goater
clg at kaod.org
Fri May 26 16:17:20 AEST 2017
On 05/26/2017 06:33 AM, Joel Stanley wrote:
> On Fri, May 26, 2017 at 7:13 AM, Eddie James <eajames at linux.vnet.ibm.com> wrote:
>> From: "Edward A. James" <eajames at us.ibm.com>
>>
>> Reorganize flash controllers into the ast2400 config. Barreleye wasn't
>> booting with the new aspeed-smc driver.
>
> Your commit message mentions Barreleye, but you're also updating Palmetto.
>
> Can you please update all of the ast2400 platforms?
>
> Also cc Cedric on your next version so he can check that we're doing
> the correct thing.
Joel,
I would also like to add CONFIG_VMSPLIT_2G on the G4 to define
correctly the SMC controller flash mapping window on the AHB Bus.
It is limited to 32MB currently
Do you think we can take these ?
http://patchwork.ozlabs.org/patch/752285/
http://patchwork.ozlabs.org/patch/752287/
C.
>> Signed-off-by: Edward A. James <eajames at us.ibm.com>
>> ---
>> arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts | 44 ++++++++--------------
>> arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 52 ++++++++------------------
>> arch/arm/boot/dts/aspeed-g4.dtsi | 34 +++++++++++++++++
>> 3 files changed, 66 insertions(+), 64 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts b/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts
>> index be1f2d1..7a616bb 100644
>> --- a/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts
>> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts
>> @@ -31,34 +31,6 @@
>> };
>> };
>>
>> - ahb {
>> - bmc_pnor: fmc at 1e620000 {
>> - reg = < 0x1e620000 0x94
>> - 0x20000000 0x02000000 >;
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> - compatible = "aspeed,ast2400-fmc";
>> - flash at 0 {
>> - reg = < 0 >;
>> - compatible = "jedec,spi-nor" ;
>> -#include "aspeed-bmc-opp-flash-layout.dtsi"
>> - };
>> - };
>> -
>> - host_pnor: spi at 1e630000 {
>> - reg = < 0x1e630000 0x18
>> - 0x30000000 0x02000000 >;
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> - compatible = "aspeed,ast2400-spi";
>> - flash at 0 {
>> - reg = < 0 >;
>> - compatible = "jedec,spi-nor" ;
>> - label = "pnor";
>> - };
>> - };
>> - };
>> -
>> leds {
>> compatible = "gpio-leds";
>>
>> @@ -76,6 +48,22 @@
>> };
>> };
>>
>> +&bmc_pnor {
>> + status = "okay";
>> + flash at 0 {
>> + status = "okay";
>> + m25p,fast-read;
>> +#include "aspeed-bmc-opp-flash-layout.dtsi"
>> + };
>> +};
>> +
>> +&host_pnor {
>> + flash at 0 {
>> + status = "okay";
>> + m25p,fast-read;
>> + };
>> +};
>> +
>> &pinctrl {
>> pinctrl-names = "default";
>> pinctrl-0 = <&pinctrl_flbusy_default &pinctrl_flwp_default
>> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
>> index b4faa1d..e55abe6 100644
>> --- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
>> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
>> @@ -47,42 +47,6 @@
>> };
>> };
>>
>> - ahb {
>> - bmc_pnor: fmc at 1e620000 {
>> - reg = < 0x1e620000 0x94
>> - 0x20000000 0x02000000 >;
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> - compatible = "aspeed,ast2400-fmc";
>> - aspeed,fmc-has-dma;
>> - interrupts = <19>;
>> - clocks = <&clk_ahb>;
>> - clock-names = "ahb";
>> - flash at 0 {
>> - reg = < 0 >;
>> - compatible = "jedec,spi-nor" ;
>> - m25p,fast-read;
>> -#include "aspeed-bmc-opp-flash-layout.dtsi"
>> - };
>> - };
>> -
>> - host_pnor: spi at 1e630000 {
>> - reg = < 0x1e630000 0x18
>> - 0x30000000 0x02000000 >;
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> - compatible = "aspeed,ast2400-spi";
>> - clocks = <&clk_ahb>;
>> - clock-names = "ahb";
>> - flash {
>> - reg = < 0 >;
>> - compatible = "jedec,spi-nor" ;
>> - label = "pnor";
>> - m25p,fast-read;
>> - };
>> - };
>> - };
>> -
>> gpio-fsi {
>> compatible = "fsi-master-gpio", "fsi-master";
>>
>> @@ -94,6 +58,22 @@
>> };
>> };
>>
>> +&bmc_pnor {
>> + status = "okay";
>> + flash at 0 {
>> + status = "okay";
>> + m25p,fast-read;
>> +#include "aspeed-bmc-opp-flash-layout.dtsi"
>> + };
>> +};
>> +
>> +&host_pnor {
>> + flash at 0 {
>> + status = "okay";
>> + m25p,fast-read;
>> + };
>> +};
>> +
>> &pinctrl {
>> pinctrl-names = "default";
>> pinctrl-0 = <&pinctrl_flbusy_default &pinctrl_flwp_default
>> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
>> index d8827d5..9fb7889 100644
>> --- a/arch/arm/boot/dts/aspeed-g4.dtsi
>> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi
>> @@ -44,6 +44,40 @@
>> #size-cells = <1>;
>> ranges;
>>
>> + bmc_pnor: fmc at 1e620000 {
>> + reg = < 0x1e620000 0x94
>> + 0x20000000 0x02000000 >;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "aspeed,ast2400-fmc";
>> + status = "disabled";
>> + aspeed,fmc-has-dma;
>> + interrupts = <19>;
>> + clocks = <&clk_ahb>;
>> + clock-names = "ahb";
>> + flash at 0 {
>> + reg = < 0 >;
>> + compatible = "jedec,spi-nor" ;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + host_pnor: spi at 1e630000 {
>> + reg = < 0x1e630000 0x18
>> + 0x30000000 0x02000000 >;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "aspeed,ast2400-spi";
>> + status = "disabled";
>> + clocks = <&clk_ahb>;
>> + clock-names = "ahb";
>> + flash at 0 {
>> + reg = < 0 >;
>> + compatible = "jedec,spi-nor" ;
>> + status = "disabled";
>> + };
>> + };
>> +
>> vic: interrupt-controller at 1e6c0080 {
>> compatible = "aspeed,ast2400-vic";
>> interrupt-controller;
>> --
>> 1.8.3.1
>>
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