[PATCH] net/ftgmac100: Expose pause frames support and add comment about RGMII

[Joel Stanley]

On Wed, Mar 29, 2017 at 2:18 PM, Benjamin Herrenschmidt
<benh at kernel.crashing.org> wrote:
> Expose to the phydev that we support Pause frame and add a comment
> mentioning how we handle RGMII clock delays via u-boot.
>
> Signed-off-by: Benjamin Herrenschmidt <benh at kernel.crashing.org>

I made a small fix to the comment about phy.txt and applied to dev-4.10.

Cheers,

Joel

> ---
>
> This is the diff between v3 that was merged and v4 that I posted
> shortly afterward.
>
>  drivers/net/ethernet/faraday/ftgmac100.c | 25 +++++++++++++++++++++++--
>  1 file changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/ethernet/faraday/ftgmac100.c b/drivers/net/ethernet/faraday/ftgmac100.c
> index d42489c..5fe2827 100644
> --- a/drivers/net/ethernet/faraday/ftgmac100.c
> +++ b/drivers/net/ethernet/faraday/ftgmac100.c
> @@ -111,8 +111,8 @@ struct ftgmac100 {
>         bool rx_pause;
>         bool aneg_pause;
>
> -       uint32_t rxdes0_edorr_mask;
> -       uint32_t txdes0_edotr_mask;
> +       u32 rxdes0_edorr_mask;
> +       u32 txdes0_edotr_mask;
>  };
>
>  static int ftgmac100_alloc_rx_buf(struct ftgmac100 *priv,
> @@ -1390,6 +1390,12 @@ static int ftgmac100_mii_probe(struct ftgmac100 *priv, phy_interface_t intf)
>                 return PTR_ERR(phydev);
>         }
>
> +       /*
> +        * Indicate that we support PAUSE frames (see comment in
> +        * Documentation/networking/phy.txt as of v4.10
> +        */
> +       phydev->supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
> +
>         phydev->advertising = phydev->supported;
>         phy_attached_info(phydev);
>
> @@ -1490,6 +1496,21 @@ static int ftgmac100_setup_mdio(struct net_device *ndev)
>                 iowrite32(reg, priv->base + FTGMAC100_OFFSET_REVR);
>         }
>
> +       /*
> +        * Note: When using RGMII mode, we simply pass "RGMII" to the
> +        *       PHY and assume that u-boot will have configured the
> +        *       clock delays appropriately for the system.
> +        *
> +        *       The implementation of the MAC in the Aspeed chips
> +        *       supports sub-ns programable delays that need to be
> +        *       configured in the SCU while the MAC IP block is in
> +        *       reset.
> +        *
> +        *       If needed in the future, we can support configuring this
> +        *       here based on device-tree properties but unless absolutely
> +        *       needed I'd rather avoid poking at the SCU registers from
> +        *       this driver.
> +        */
>         if (np)
>                 intf_prop = of_get_property(np, "phy-interface", NULL);
>         if (intf_prop) {
> --
> 2.9.
>