[PATCH linux dev-4.10] ARM: aspeed: zaius: Support new board FSI gpio pin mapping

[Robert Lippert]

FSI routing was broken on EVT boards and all boards were reworked
to use the nearest available GPIO pins.  Future boards have
fixed the issue so need to use the original planned GPIOG ports.

Signed-off-by: Robert Lippert <rlippert at google.com>
---
 arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts |  8 ++++++--
 arch/arm/mach-aspeed/aspeed.c              | 30 ++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
index b5c4c0fb2986..68baf3288263 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
@@ -80,8 +80,12 @@
 
 		status = "okay";
 
-		clock-gpios = <&gpio ASPEED_GPIO(C, 3) GPIO_ACTIVE_HIGH>;
-		data-gpios = <&gpio ASPEED_GPIO(C, 2) GPIO_ACTIVE_HIGH>;
+		/*
+		 * These 2 GPIOs are set per board revision in aspeed.c.
+		 * These are the DVT and beyond values:
+		 * clock-gpios = <&gpio ASPEED_GPIO(G, 0) GPIO_ACTIVE_HIGH>;
+		 * data-gpios = <&gpio ASPEED_GPIO(G, 1) GPIO_ACTIVE_HIGH>;
+		 */
 		trans-gpios = <&gpio ASPEED_GPIO(O, 6) GPIO_ACTIVE_HIGH>;
 		enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
 		mux-gpios = <&gpio ASPEED_GPIO(P, 6) GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
index 5c88286c96fd..1e080d8909f4 100644
--- a/arch/arm/mach-aspeed/aspeed.c
+++ b/arch/arm/mach-aspeed/aspeed.c
@@ -8,6 +8,8 @@
  */
 
 #include <linux/init.h>
+#include <linux/gpio/machine.h>
+#include <dt-bindings/gpio/aspeed-gpio.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/io.h>
@@ -141,6 +143,34 @@ static void __init do_zaius_setup(void)
 	/* Read BOARD_REV[4:0] fuses from GPIOM[7:3] */
 	reg = readl(AST_IO(AST_BASE_GPIO | 0x78));
 	board_rev = (reg >> 3) & 0x1F;
+	printk(KERN_INFO "Zaius platform board revision: 0x%02x\n", board_rev);
+
+	/* EVT boards have different FSI pin mappings */
+	if (board_rev < 0x08) {
+		static struct gpiod_lookup_table fsi_evt_gpio_lookup = {
+			.dev_id = "fsi-master",
+			.table = {
+				GPIO_LOOKUP("1e780000.gpio", ASPEED_GPIO(C, 3),
+					    "clock", GPIO_ACTIVE_HIGH),
+				GPIO_LOOKUP("1e780000.gpio", ASPEED_GPIO(C, 2),
+					    "data", GPIO_ACTIVE_HIGH),
+				{ },
+			},
+		};
+		gpiod_add_lookup_table(&fsi_evt_gpio_lookup);
+	} else {
+		static struct gpiod_lookup_table fsi_gpio_lookup = {
+			.dev_id = "fsi-master",
+			.table = {
+				GPIO_LOOKUP("1e780000.gpio", ASPEED_GPIO(G, 0),
+					    "clock", GPIO_ACTIVE_HIGH),
+				GPIO_LOOKUP("1e780000.gpio", ASPEED_GPIO(G, 1),
+					    "data", GPIO_ACTIVE_HIGH),
+				{ },
+			},
+		};
+		gpiod_add_lookup_table(&fsi_gpio_lookup);
+	}
 
 	/* Assert MAC2 PHY hardware reset */
 	/* Set pin low */
-- 
2.13.0.506.g27d5fe0cd-goog