[PATCH linux dev-4.10] mtd: spi-nor: aspeed: set 4B setting for all chips

[Cédric Le Goater]

The driver made the wrong assumption that the 4B setting was
autodetected for all chips of the AST2500 FMC flash controller. This
is only the case for the CS0.

Signed-off-by: Cédric Le Goater <clg at kaod.org>
---

 To be noted that the speed setting of CS1 is quite low because the
 HCLK/16 divider is used. It can be improved.
 
 drivers/mtd/spi-nor/aspeed-smc.c |   13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

Index: linux-openbmc-4.10.git/drivers/mtd/spi-nor/aspeed-smc.c
===================================================================
--- linux-openbmc-4.10.git.orig/drivers/mtd/spi-nor/aspeed-smc.c
+++ linux-openbmc-4.10.git/drivers/mtd/spi-nor/aspeed-smc.c
@@ -794,19 +794,18 @@ static void aspeed_smc_chip_set_type(str
 }
 
 /*
- * The AST2500 FMC flash controller should be strapped by hardware, or
- * autodetected, but the AST2500 SPI flash needs to be set.
+ * The first chip of the AST2500 FMC flash controller is strapped by
+ * hardware, or autodetected, but other chips need to be set. Enforce
+ * the 4B setting for all chips.
  */
 static void aspeed_smc_chip_set_4b(struct aspeed_smc_chip *chip)
 {
 	struct aspeed_smc_controller *controller = chip->controller;
 	u32 reg;
 
-	if (chip->controller->info == &spi_2500_info) {
-		reg = readl(controller->regs + CE_CONTROL_REG);
-		reg |= 1 << chip->cs;
-		writel(reg, controller->regs + CE_CONTROL_REG);
-	}
+	reg = readl(controller->regs + CE_CONTROL_REG);
+	reg |= 1 << chip->cs;
+	writel(reg, controller->regs + CE_CONTROL_REG);
 }
 
 /*