[PATCH linux dev-4.10] iio: aspeed-adc: wait for initial sequence.
Rick Altherr
raltherr at google.com
Fri Jul 14 04:32:52 AEST 2017
Huh. We've been getting valid readings without this on our AST2500
systems. Regardless, it is correct for AST2500. On AST2400 though, there
is no INIT_RDY bit.
On Thu, Jul 13, 2017 at 7:28 AM, Mykola Kostenok <c_mykolak at mellanox.com>
wrote:
> This patch enables adc engine at initialization time and waits
> for the initial sequence completion before enabling adc channels.
>
> Without this code adc channels are not functional and shows
> zeros for all connected channels.
>
> Tested on mellanox msn platform.
>
> Signed-off-by: Mykola Kostenok <c_mykolak at mellanox.com>
> ---
> drivers/iio/adc/aspeed_adc.c | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c
> index 2283ed2..e4ad6ef 100644
> --- a/drivers/iio/adc/aspeed_adc.c
> +++ b/drivers/iio/adc/aspeed_adc.c
> @@ -22,6 +22,7 @@
>
> #include <linux/iio/iio.h>
> #include <linux/iio/driver.h>
> +#include <linux/iopoll.h>
>
> #define ASPEED_RESOLUTION_BITS 10
> #define ASPEED_CLOCKS_PER_SAMPLE 12
> @@ -38,6 +39,11 @@
>
> #define ASPEED_ENGINE_ENABLE BIT(0)
>
> +#define ASPEED_ADC_CTRL_INIT_RDY BIT(8)
> +
> +#define ASPEED_ADC_INIT_POLLING_TIME 500
> +#define ASPEED_ADC_INIT_TIMEOUT 500000
> +
> struct aspeed_adc_model_data {
> const char *model_name;
> unsigned int min_sampling_rate; // Hz
> @@ -210,6 +216,20 @@ static int aspeed_adc_probe(struct platform_device
> *pdev)
> goto scaler_error;
> }
>
> + /* Enable engine in normal mode. */
> + writel(ASPEED_OPERATION_MODE_NORMAL | ASPEED_ENGINE_ENABLE,
> + data->base + ASPEED_REG_ENGINE_CONTROL);
> +
> + /* Wait for initial sequence complete. */
> + ret = readl_poll_timeout(data->base + ASPEED_REG_ENGINE_CONTROL,
> + adc_engine_control_reg_val,
> + adc_engine_control_reg_val &
> + ASPEED_ADC_CTRL_INIT_RDY,
> + ASPEED_ADC_INIT_POLLING_TIME,
> + ASPEED_ADC_INIT_TIMEOUT);
> + if (ret)
> + goto scaler_error;
> +
> /* Start all channels in normal mode. */
> clk_prepare_enable(data->clk_scaler->clk);
> adc_engine_control_reg_val = GENMASK(31, 16) |
> --
> 2.8.4
>
>
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