[PATCH linux dev-4.10] ARM: aspeed: Release UART1 from reset for all platforms
Joel Stanley
joel at jms.id.au
Tue Jul 4 11:10:12 AEST 2017
This workaround was in place for Zaius. Make it common to all
platforms as the held-in-reset behaviour breaks the Linux tty layer
where users expect the existence of a device to mean it is usable.
Signed-off-by: Joel Stanley <joel at jms.id.au>
---
arch/arm/mach-aspeed/aspeed.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
index 420a8d0344da..d3eb9e7c2d8b 100644
--- a/arch/arm/mach-aspeed/aspeed.c
+++ b/arch/arm/mach-aspeed/aspeed.c
@@ -173,14 +173,6 @@ static void __init do_zaius_setup(void)
/* Set pin high */
reg = readl(AST_IO(AST_BASE_GPIO | 0x00));
writel(reg | phy_reset_mask, AST_IO(AST_BASE_GPIO | 0x00));
-
- /* Disable default behavior of UART1 being held in reset by LPCRST#.
- * By releasing UART1 from being controlled by LPC reset, it becomes
- * immediately available regardless of the host being up.
- */
- reg = readl(AST_IO(AST_BASE_LPC | 0x98));
- /* Clear "Enable UART1 reset source from LPC" */
- writel(reg & ~BIT(4), AST_IO(AST_BASE_LPC | 0x98));
}
static void __init do_witherspoon_setup(void)
@@ -254,6 +246,14 @@ static void __init aspeed_init_early(void)
*/
writel(0x001fdff3, AST_IO(AST_BASE_SCU | 0x9c));
+ /* Disable default behavior of UART1 being held in reset by LPCRST#.
+ * By releasing UART1 from being controlled by LPC reset, it becomes
+ * immediately available regardless of the host being up.
+ */
+ reg = readl(AST_IO(AST_BASE_LPC | 0x98));
+ /* Clear "Enable UART1 reset source from LPC" */
+ writel(reg & ~BIT(4), AST_IO(AST_BASE_LPC | 0x98));
+
/*
* Temporary setup of AST registers until pinmux driver is complete
*/
--
2.13.2
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