[PATCH linux dev-4.10] aspeed-g5: add aspeed,ast2500-pwm-tacho.

Patrick Venture venture at google.com
Tue Jul 4 00:53:39 AEST 2017


On Sun, Jul 2, 2017 at 11:14 PM, Joel Stanley <joel at jms.id.au> wrote:
> On Fri, Jun 30, 2017 at 9:18 PM, Mykola Kostenok <c_mykolak at mellanox.com> wrote:
>> Add aspeed,ast2500-pwm-tacho to dtsi.
>> Enable aspeed,ast2500-pwm-tacho for msn.
>>
>> Signed-off-by: Mykola Kostenok <c_mykolak at mellanox.com>
>
> Patrick, you're our pwm/tach expert. Can you please review this one?
>
> Cheers,
>
> Joel
>
>> ---
>>  arch/arm/boot/dts/aspeed-bmc-mellanox-msn.dts | 45 +++++++++++++++++++++++++++
>>  arch/arm/boot/dts/aspeed-g5.dtsi              | 16 ++++++++++
>>  2 files changed, 61 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/aspeed-bmc-mellanox-msn.dts b/arch/arm/boot/dts/aspeed-bmc-mellanox-msn.dts
>> index c71a6dbe1410..55d5dc15d136 100644
>> --- a/arch/arm/boot/dts/aspeed-bmc-mellanox-msn.dts
>> +++ b/arch/arm/boot/dts/aspeed-bmc-mellanox-msn.dts
>> @@ -144,3 +144,48 @@
>>         status = "okay";
>>  };
>>
>> +&pwm_tacho {
>> +       status = "okay";
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&pinctrl_pwm0_default>;
>> +
>> +       fan at 0 {
>> +               reg = <0x00>;
>> +               aspeed,fan-tach-ch = /bits/ 8 <0x00>;
>> +       };
>> +
>> +       fan at 1 {
>> +               reg = <0x00>;
>> +               aspeed,fan-tach-ch = /bits/ 8 <0x01>;
>> +       };
>> +
>> +       fan at 2 {
>> +               reg = <0x00>;
>> +               aspeed,fan-tach-ch = /bits/ 8 <0x02>;
>> +       };
>> +
>> +       fan at 3 {
>> +               reg = <0x00>;
>> +               aspeed,fan-tach-ch = /bits/ 8 <0x03>;
>> +       };
>> +
>> +       fan at 4 {
>> +               reg = <0x00>;
>> +               aspeed,fan-tach-ch = /bits/ 8 <0x04>;
>> +       };
>> +
>> +       fan at 5 {
>> +               reg = <0x00>;
>> +               aspeed,fan-tach-ch = /bits/ 8 <0x05>;
>> +       };
>> +
>> +       fan at 6 {
>> +               reg = <0x00>;
>> +               aspeed,fan-tach-ch = /bits/ 8 <0x06>;
>> +       };
>> +
>> +       fan at 7 {
>> +               reg = <0x00>;
>> +               aspeed,fan-tach-ch = /bits/ 8 <0x07>;
>> +       };
>> +};

These all use the same pwm? Is that deliberate?

>> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
>> index 992242d3b22e..01c86bb71932 100644
>> --- a/arch/arm/boot/dts/aspeed-g5.dtsi
>> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
>> @@ -35,6 +35,14 @@
>>                 i2c13 = &i2c13;
>>         };
>>
>> +       clocks {
>> +               pwm_tacho_fixed_clk: fixedclk {
>> +                       compatible = "fixed-clock";
>> +                       #clock-cells = <0>;
>> +                       clock-frequency = <24000000>;
>> +               };
>> +       };
>> +
>>         ahb {
>>                 compatible = "simple-bus";
>>                 #address-cells = <1>;
>> @@ -366,6 +374,14 @@
>>                                 #size-cells = <1>;
>>                                 ranges = <0 0x1e78a000 0x1000>;
>>                         };

I didn't put mine behind the ahb.  I am still learning device-tree-fu.
this likely isn't an issue at all.

>> +                       pwm_tacho: pwm-tacho-controller at 1e786000 {
>> +                               compatible = "aspeed,ast2500-pwm-tacho";
>> +                               #address-cells = <1>;
>> +                               #size-cells = <0>;
>> +                               reg = <0x1e786000 0x1000>;
>> +                               clocks = <&pwm_tacho_fixed_clk>;
>> +                               status = "disabled";
>> +                       };
>>                 };
>>         };
>>  };
>> --
>> 2.11.0
>>


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