[PATCH linux] arm: aspeed: zaius: Disable LPC reset for UART1

[Xo Wang]

Heh, that's fair. I guess the code is an opaque block of bit twiddling.

Please take a look at v2.

On Fri, Jan 27, 2017 at 9:41 AM, Rick Altherr <raltherr at google.com> wrote:
> From the patch, I can't tell what your change is doing.  You've described
> the problem but not the solution.
>
> On Fri, Jan 27, 2017 at 9:08 AM, Xo Wang <xow at google.com> wrote:
>>
>> Currently, UART1 on Zaius BMC is unusable until brought out of reset by
>> powering the host on. In this reset state, ttyS0 can still be opened
>> and UART1 silently drops bytes, which is not obviously expected
>> behavior.
>>
>> Signed-off-by: Xo Wang <xow at google.com
>> ---
>>  arch/arm/mach-aspeed/aspeed.c | 4 ++++
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
>> index 4bd3680d742d..9f06191f1630 100644
>> --- a/arch/arm/mach-aspeed/aspeed.c
>> +++ b/arch/arm/mach-aspeed/aspeed.c
>> @@ -185,6 +185,10 @@ static void __init do_zaius_setup(void)
>>
>>         /* Set SPI1 CE0 decoding window to 0x30000000 */
>>         writel(0x68600000, AST_IO(AST_BASE_SPI | 0x30));
>> +
>> +       /* Disable LPC reset for UART1 */
>> +       reg = readl(AST_IO(AST_BASE_LPC | 0x98));
>> +       writel(reg & ~BIT(4), AST_IO(AST_BASE_LPC | 0x98));
>>  }
>>
>>  static void __init do_witherspoon_setup(void)
>> --
>> 2.11.0.483.g087da7b7c-goog
>>
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>
>