[PATCH v3 2/5] Documentation: dt: misc: Add Aspeed ast2400/2500 LPC Control bindings

Andrew Jeffery andrew at aj.id.au
Wed Jan 11 12:29:30 AEDT 2017

On Tue, 2017-01-10 at 20:06 +1100, Cyril Bur wrote:
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/misc/aspeed-lpc-ctrl.txt
> @@ -0,0 +1,78 @@
> +ASpeed LPC Control
> +==================
> +This binding defines the LPC control for ASpeed SoCs. Portitions of

Typo here ('Portions'), but otherwise the bindings look okay.

> +the LPC bus can be access by other processors on the system, address
> +ranges on the bus can map accesses from another processor to regions
> +of the ASpeed SoC memory space.
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