[PATCH linux dev-4.7] arm: aspped: romulus: Set PNOR SPI address mapping

[Andrew Jeffery]

On Tue, Feb 28, 2017, at 20:10, Joel Stanley wrote:

> 

> 

> On 28 Feb 2017 17:49, "Lei YU" <mine260309 at gmail.com> wrote:
>> The PNOR SPI address mapping is the same as Witherspoon.
> 

> This should be handled by the device drivers we now have.

> 

> Mbox brains trust, any idea why we would still need this?



I was going to say NAK for the same reason.



Lei: are you absolutely positive you need this? If you do something has gone wrong. Is mboxd integrated into the romulus image? If not we need a yocto patch rather than a kernel patch.


Andrew



> Cheers,

> 

> Joel

> 

>> 

>> Signed-off-by: Lei YU <mine260309 at gmail.com>

>>  ---

>>   arch/arm/mach-aspeed/aspeed.c | 18 ++++++++++++++++++

>>   1 file changed, 18 insertions(+)

>> 

>>  diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-
>>  aspeed/aspeed.c
>>  index 726b8fa..ec9eecf 100644

>>  --- a/arch/arm/mach-aspeed/aspeed.c

>>  +++ b/arch/arm/mach-aspeed/aspeed.c

>>  @@ -221,6 +221,24 @@ static void __init do_witherspoon_setup(void)

>>   static void __init do_romulus_setup(void)

>>   {

>>          do_common_setup();

>>  +

>>  +       /* Setup PNOR address mapping for 64M flash

>>  +        *

>>  +        *   ADRBASE: 0x3000 (0x30000000)

>>  +        *   HWMBASE: 0x0C00 (0x0C000000)

>>  +        *  ADDRMASK: 0xFC00 (0xFC000000)

>>  +        *   HWNCARE: 0x03FF (0x03FF0000)

>>  +        *

>>  +        * Mapping appears at 0x60300fc000000 on the host

>>  +        */

>>  +       writel(0x30000C00, AST_IO(AST_BASE_LPC | 0x88));

>>  +       writel(0xFC0003FF, AST_IO(AST_BASE_LPC | 0x8C));

>>  +

>>  +       /* Set SPI1 CE1 decoding window to 0x34000000 */

>>  +       writel(0x70680000, AST_IO(AST_BASE_SPI | 0x34));

>>  +

>>  +       /* Set SPI1 CE0 decoding window to 0x30000000 */

>>  +       writel(0x68600000, AST_IO(AST_BASE_SPI | 0x30));

>>   }

>> 

>>   #define SCU_PASSWORD   0x1688A8A8

>> --
>>  1.9.1
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