[PATCH v3] gpio: aspeed: Add banks Y, Z, AA, AB and AC

[Linus Walleij]

On Wed, Feb 1, 2017 at 2:20 AM, Andrew Jeffery <andrew at aj.id.au> wrote:
> On Wed, 2017-02-01 at 11:22 +1030, Andrew Jeffery wrote:
>> On Tue, 2017-01-31 at 15:50 +0100, Linus Walleij wrote:
>> > > > > > On Fri, Jan 27, 2017 at 5:24 AM, Andrew Jeffery <andrew at aj.id.au> wrote:
>> > > This is less straight-forward than one would hope, as some banks only
>> > > have 4 pins rather than 8, others are output only, yet more (W and
>> > > X, already supported) are input-only, and in the case of the g4 SoC bank
>> > > AC doesn't exist.
>> > >
>> > > Add some structs to describe the varying properties of different banks
>> > > and integrate mechanisms to deny requests for unsupported
>> > > configurations.
>> > >
>> > > > > Signed-off-by: Andrew Jeffery <andrew at aj.id.au>
>> > >
>> > > ---
>> > >
>> > > Since v2:
>> >
>> > Patch applied with some patch -p1 < fuzz
>> > please check the result.
>>
>
> *snip*
>
>> Regardless, I'll try to recreate it myself and inspect the fuzz damage.
>
> Ah, I think I see what's happened. I didn't send "gpio: aspeed: Make
> bank names strings" again because you claimed you had applied v1 in the
> v2 thread[1]. This patch doesn't fuzz when "gpio: aspeed: Make bank
> names strings" has been applied, so is it possible that you tried
> applying it to a tree missing "gpio: aspeed: Make bank names strings"?

I mistakedly applied *both* patches to the pinctrl tree, devel branch.

I blame stress.

Oh well I guess I have to keep them there and remove this copy
from the gpio tree.

If the version I applied in the pinctrl tree is the wrong one (which
is possible) then please send an incremental patch on top fixing
the difference, so I can apply that to the pinctrl tree too....

Yours,
Linus Walleij