[PATCH v3] gpio: aspeed: Add banks Y, Z, AA, AB and AC

[Linus Walleij]

On Fri, Jan 27, 2017 at 5:24 AM, Andrew Jeffery <andrew at aj.id.au> wrote:

> This is less straight-forward than one would hope, as some banks only
> have 4 pins rather than 8, others are output only, yet more (W and
> X, already supported) are input-only, and in the case of the g4 SoC bank
> AC doesn't exist.
>
> Add some structs to describe the varying properties of different banks
> and integrate mechanisms to deny requests for unsupported
> configurations.
>
> Signed-off-by: Andrew Jeffery <andrew at aj.id.au>
> ---
>
> Since v2:

Patch applied with some patch -p1 < fuzz
please check the result.

Yours,
Linus Walleij