[PATCH linux dev-4.7 v4] ARM: dts: aspeed: Modify Laanyang BMC device tree

[Andrew Jeffery]

On Thu, 2017-04-27 at 12:02 +0800, Ken Chen wrote:
> Modify Lanyang dts and add lanyang initial in aspeed.c
> 
> Signed-off-by: Ken Chen <chen.kenyy at inventec.com>

Acked-by: Andrew Jeffery <andrew at aj.id.au>

> ---
>  arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dts | 13 ++++++-------
>  arch/arm/mach-aspeed/aspeed.c                | 17 +++++++++++++++++
>  2 files changed, 23 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dts b/arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dts
> index 176e4b4..6456458 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dts
> @@ -1,4 +1,4 @@
> -/dts-v1/;
> +/dts-v3/;
>  

Was this necessary? What do we get from the change?

Cheers,

Andrew

>  #include "aspeed-g5.dtsi"
>  #include <dt-bindings/gpio/aspeed-gpio.h>
> @@ -302,18 +302,17 @@
>  };
>  
>  &gpio {
> > -	line_apss_reset {
> > -		gpio-hog;
> > -		gpios = <ASPEED_GPIO(E, 4) GPIO_ACTIVE_HIGH>;
> > -		output-high;
> > -		line-name = "BMC_APSS_RESET_N";
> > -	};
> +
>  };
>  
>  &vuart {
> >  	status = "okay";
>  };
>  
> +&gfx {
> +        status = "okay";
> +};
> +
>  &pinctrl {
> >  	aspeed,external-nodes = <&gfx &lhc>;
>  };
> diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
> index a7b03a0..0717181 100644
> --- a/arch/arm/mach-aspeed/aspeed.c
> +++ b/arch/arm/mach-aspeed/aspeed.c
> @@ -238,6 +238,21 @@ static void __init do_romulus_setup(void)
>      writel(reg & ~BIT(4), AST_IO(AST_BASE_LPC | 0x98));
>  }
>  
> +static void __init do_lanyang_setup(void)
> +{
> +        unsigned long reg;
> +
> +        do_common_setup();
> +
> +        /* Disable default behavior of UART1 being held in reset by LPCRST#.
> +         * By releasing UART1 from being controlled by LPC reset, it becomes
> +         * immediately available regardless of the host being up.
> +         */
> +        reg = readl(AST_IO(AST_BASE_LPC | 0x98));
> +        /* Clear "Enable UART1 reset source from LPC" */
> +        writel(reg & ~BIT(4), AST_IO(AST_BASE_LPC | 0x98));
> +}
> +
> >  #define SCU_PASSWORD	0x1688A8A8
>  
>  static void __init aspeed_init_early(void)
> @@ -275,6 +290,8 @@ static void __init aspeed_init_early(void)
> >  		do_witherspoon_setup();
> >  	if (of_machine_is_compatible("ibm,romulus-bmc"))
> >  		do_romulus_setup();
> +        if (of_machine_is_compatible("inventec,lanyang-bmc"))
> +                do_lanyang_setup();
>  }
>  
>  static void __init aspeed_map_io(void)
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