[PATCH linux dev-4.10 05/10] aspeed: zaius: Disable GPIO bias via devicetree pinconf requests

Andrew Jeffery andrew at aj.id.au
Thu Apr 27 16:08:18 AEST 2017


Given there are fixes presumably present in revisions beyond EVT1, the
special-casing done in the board file is implemented by separate
devicetrees.

Signed-off-by: Andrew Jeffery <andrew at aj.id.au>
---
 arch/arm/boot/dts/Makefile                      |  1 +
 arch/arm/boot/dts/aspeed-bmc-opp-zaius-evt1.dts | 20 ++++++++++++++++++++
 arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts      | 10 ++++++++++
 arch/arm/mach-aspeed/aspeed.c                   | 11 -----------
 4 files changed, 31 insertions(+), 11 deletions(-)
 create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-zaius-evt1.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 6127fd94591c..6102e7bd21ae 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -989,6 +989,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += aspeed-bmc-opp-palmetto.dtb \
 	aspeed-bmc-opp-garrison.dtb \
 	aspeed-bmc-opp-witherspoon.dtb \
 	aspeed-bmc-opp-zaius.dtb \
+	aspeed-bmc-opp-zaius-evt1.dtb \
 	aspeed-ast2500-evb.dtb
 endif
 
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius-evt1.dts b/arch/arm/boot/dts/aspeed-bmc-opp-zaius-evt1.dts
new file mode 100644
index 000000000000..21b87a5dbae3
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-zaius-evt1.dts
@@ -0,0 +1,20 @@
+#include "aspeed-bmc-opp-zaius.dts"
+
+&pinctrl {
+	pinctrl_gpiogab_unbiased: gpiogab_unbiased {
+		pins = "A14", "E13", "D13", "C13", "B13", "Y21", "AA22", "U18";
+		bias-disable;
+	};
+
+	pinctrl_gpioi_unbiased: gpioi_unbiased {
+		pins = "C22", "G18", "D19", "C20", "B22", "G19", "C18", "E20";
+		bias-disable;
+	};
+};
+
+&gpio {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gpioh_unbiased
+			&pinctrl_gpiogab_unbiased
+			&pinctrl_gpioi_unbiased>;
+};
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
index 73496c8d50f6..c6e58c5b4df1 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
@@ -359,4 +359,14 @@
 
 &pinctrl {
 	aspeed,external-nodes = <&gfx &lhc>;
+
+	pinctrl_gpioh_unbiased: gpioi_unbiased {
+		pins = "A8", "C7", "B7", "A7", "D7", "B6", "A6", "E7";
+		bias-disable;
+	};
+};
+
+&gpio {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gpioh_unbiased>;
 };
diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
index b3aba87964bf..f73a72676437 100644
--- a/arch/arm/mach-aspeed/aspeed.c
+++ b/arch/arm/mach-aspeed/aspeed.c
@@ -124,17 +124,6 @@ static void __init do_zaius_setup(void)
 	reg = readl(AST_IO(AST_BASE_GPIO | 0x78));
 	board_rev = (reg >> 3) & 0x1F;
 
-	/* EVT1 hacks */
-	if (board_rev == 0) {
-		/* Disable GPIO I, G/AB pulldowns due to weak driving buffers */
-		reg = readl(AST_IO(AST_BASE_SCU | 0x8C));
-		writel(reg | BIT(24) | BIT(22), AST_IO(AST_BASE_SCU | 0x8C));
-	}
-
-	/* Disable GPIO H/AC pulldowns to float 1-wire interface pins */
-	reg = readl(AST_IO(AST_BASE_SCU | 0x8C));
-	writel(reg | BIT(23), AST_IO(AST_BASE_SCU | 0x8C));
-
 	/* Assert MAC2 PHY hardware reset */
 	/* Set pin low */
 	reg = readl(AST_IO(AST_BASE_GPIO | 0x00));
-- 
2.9.3



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