[PATCH linux dev-4.10 04/10] aspeed: garrison: Request RGMII and MDIO through devicetree

Andrew Jeffery andrew at aj.id.au
Thu Apr 27 16:08:17 AEST 2017


This drops the muxing of ROMCS[1-3]#, ROMA24.

I assume they are unused as no other system designs have used them.

Signed-off-by: Andrew Jeffery <andrew at aj.id.au>
---
 arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts | 5 +++++
 arch/arm/mach-aspeed/aspeed.c                 | 3 ---
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts b/arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts
index 3bdaaf5008b2..8518bdf529f4 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts
@@ -121,4 +121,9 @@
 
 &vuart {
 	status = "okay";
+}
+
+&mac0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
 };
diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
index 2333670f5c1d..b3aba87964bf 100644
--- a/arch/arm/mach-aspeed/aspeed.c
+++ b/arch/arm/mach-aspeed/aspeed.c
@@ -103,9 +103,6 @@ static void __init do_garrison_setup(void)
 	/* Setup PNOR address mapping for 64M flash */
 	writel(0x30000C00, AST_IO(AST_BASE_LPC | 0x88));
 	writel(0xFC0003FF, AST_IO(AST_BASE_LPC | 0x8C));
-
-	/* SCU setup */
-	writel(0xd7000000, AST_IO(AST_BASE_SCU | 0x88));
 }
 
 static void __init do_ast2500evb_setup(void)
-- 
2.9.3



More information about the openbmc mailing list