[PATCH linux dev-4.7 v2] ARM: dts: aspeed: Modify Laanyang BMC device tree

[Andrew Jeffery]

On Wed, 2017-04-26 at 17:45 +0930, Joel Stanley wrote:
> Hi Ken,
> 
> Thank you for your patch. I have some questions below.
> 
> > On Wed, Apr 26, 2017 at 2:43 PM, Ken Chen <chen.kenyy at inventec.com> wrote:
> > 
> > +        /* Setup PNOR address mapping for 64M flash
> > +         *
> > +         *   ADRBASE: 0x3000 (0x30000000)
> > +         *   HWMBASE: 0x0C00 (0x0C000000)
> > +         *  ADDRMASK: 0xFC00 (0xFC000000)
> > +         *   HWNCARE: 0x03FF (0x03FF0000)
> > +         *
> > +         * Mapping appears at 0x60300fc000000 on the host
> > +         */
> > +        writel(0x30000C00, AST_IO(AST_BASE_LPC | 0x88));
> > +        writel(0xFC0003FF, AST_IO(AST_BASE_LPC | 0x8C));
> > +
> > +        /* Set SPI1 CE1 decoding window to 0x34000000 */
> > +        writel(0x70680000, AST_IO(AST_BASE_SPI | 0x34));
> > +
> > +        /* Set SPI1 CE0 decoding window to 0x30000000 */
> > +        writel(0x68600000, AST_IO(AST_BASE_SPI | 0x30));
> 
> We should not need to do this. mboxd will set them.

To clarify, there are two different cases here, but the outcome remains
that we don't need the above. We don't need to set the two LPC
registers because mboxd will set them via the interface exposed by
drivers/misc/aspeed-lpc-ctrl.c. We also don't need to set the two SPI
registers because the SMC driver will configure them based on the
chip(s) detected on the bus during driver probe.

Cheers,

Andrew
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 801 bytes
Desc: This is a digitally signed message part
URL: <http://lists.ozlabs.org/pipermail/openbmc/attachments/20170426/190ab243/attachment.sig>