[PATCH linux v1 3/3] devicetree: Add support in Zaius for PWM controller and four PWM outputs(fans)

[Jaghathiswari Rankappagounder Natarajan]

Signed-off-by: Jaghathiswari Rankappagounder Natarajan <jaghu at google.com>
---
 arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 63 ++++++++++++++++++++++++++++++
 1 file changed, 63 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
index eef045b..82a12dc 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
@@ -83,6 +83,69 @@
 			gpios = <&gpio ASPEED_GPIO(H, 7) GPIO_ACTIVE_LOW>;
 		};
 	};
+
+	pwm_controller {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0x1E786000 0x78>;
+		compatible = "aspeed-pwm-controller";
+		clock_enable = /bits/ 8 <0x01>;
+		clock_source = /bits/ 8 <0x00>;
+		typem_pwm_clock = <5 0 95>;
+	};
+
+	pwm0 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			reg = <0x1E786000 0x78>;
+			compatible = "aspeed-pwm-dev";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_pwm0_default>;
+			pwm_channel_enable = /bits/ 8 <0x00>;
+			pwm_type = /bits/ 8 <0x00>;
+			rising = /bits/ 8 <0x00>;
+			falling = /bits/ 8 <0x00>;
+	};
+
+	pwm1 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			reg = <0x1E786000 0x78>;
+			compatible = "aspeed-pwm-dev";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_pwm1_default>;
+			pwm_channel_enable = /bits/ 8 <0x01>;
+			pwm_type = /bits/ 8 <0x00>;
+			rising = /bits/ 8 <0x00>;
+			falling = /bits/ 8 <0x00>;
+	};
+
+	pwm2 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			reg = <0x1E786000 0x78>;
+			compatible = "aspeed-pwm-dev";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_pwm2_default>;
+			pwm_channel_enable = /bits/ 8 <0x02>;
+			pwm_type = /bits/ 8 <0x00>;
+			rising = /bits/ 8 <0x00>;
+			falling = /bits/ 8 <0x00>;
+	};
+
+	pwm3 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			reg = <0x1E786000 0x78>;
+			compatible = "aspeed-pwm-dev";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_pwm3_default>;
+			pwm_channel_enable = /bits/ 8 <0x03>;
+			pwm_type = /bits/ 8 <0x00>;
+			rising = /bits/ 8 <0x00>;
+			falling = /bits/ 8 <0x00>;
+	};
+
 };

 &uart5 {
--
2.8.0.rc3.226.g39d4020