[PATCH 2/3] aspeed: Fixed FUC -> FUN typo in SCU.
Maxim Sloyko
maxims at google.com
Tue Oct 18 04:57:24 AEDT 2016
On Thu, Oct 13, 2016 at 5:07 PM, Joel Stanley <joel at jms.id.au> wrote:
> On Fri, Sep 30, 2016 at 7:27 AM, <maxims at google.com> wrote:
> > From: Maxim Sloyko <maxims at google.com>
> >
> > Fixed FUC -> FUN typo in SCU.
>
> This lacks a signed off by as previously discussed.
>
> You have not made a convincing argument for this change. I suggest you
> drop the patch from your series.
>
Are you against this change per se or just against it being in this patch
series?
>
> Cheers,
>
> Joel
>
> > ---
> > arch/arm/include/asm/arch-aspeed/regs-scu.h | 65
> +++++++++++++++--------------
> > arch/arm/mach-aspeed/ast-scu.c | 2 +-
> > 2 files changed, 34 insertions(+), 33 deletions(-)
> >
> > diff --git a/arch/arm/include/asm/arch-aspeed/regs-scu.h
> b/arch/arm/include/asm/arch-aspeed/regs-scu.h
> > index b714fa9..aab032a 100644
> > --- a/arch/arm/include/asm/arch-aspeed/regs-scu.h
> > +++ b/arch/arm/include/asm/arch-aspeed/regs-scu.h
> > @@ -830,49 +830,50 @@
> > /* AST_SCU_FUN_PIN_CTRL5 0x90 - Multi-function Pin
> Control#5 */
> > #define SCU_FUN_PIN_SPICS1 (0x1 << 31)
> > #define SCU_FUN_PIN_LPC_PLUS (0x1 << 30)
> > -#define SCU_FUC_PIN_USB20_HOST (0x1 << 29)
> > -#define SCU_FUC_PIN_USB11_PORT4 (0x1 << 28)
> > -#define SCU_FUC_PIN_I2C14 (0x1 << 27)
> > -#define SCU_FUC_PIN_I2C13 (0x1 << 26)
> > -#define SCU_FUC_PIN_I2C12 (0x1 << 25)
> > -#define SCU_FUC_PIN_I2C11 (0x1 << 24)
> > -#define SCU_FUC_PIN_I2C10 (0x1 << 23)
> > -#define SCU_FUC_PIN_I2C9 (0x1 << 22)
> > -#define SCU_FUC_PIN_I2C8 (0x1 << 21)
> > -#define SCU_FUC_PIN_I2C7 (0x1 << 20)
> > -#define SCU_FUC_PIN_I2C6 (0x1 << 19)
> > -#define SCU_FUC_PIN_I2C5 (0x1 << 18)
> > -#define SCU_FUC_PIN_I2C4 (0x1 << 17)
> > -#define SCU_FUC_PIN_I2C3 (0x1 << 16)
> > -#define SCU_FUC_PIN_MII2_RX_DWN_DIS (0x1 << 15)
> > -#define SCU_FUC_PIN_MII2_TX_DWN_DIS (0x1 << 14)
> > -#define SCU_FUC_PIN_MII1_RX_DWN_DIS (0x1 << 13)
> > -#define SCU_FUC_PIN_MII1_TX_DWN_DIS (0x1 << 12)
> > -
> > -#define SCU_FUC_PIN_MII2_TX_DRIV(x) (x << 10)
> > -#define SCU_FUC_PIN_MII2_TX_DRIV_MASK (0x3 << 10)
> > -#define SCU_FUC_PIN_MII1_TX_DRIV(x) (x << 8)
> > -#define SCU_FUC_PIN_MII1_TX_DRIV_MASK (0x3 << 8)
> > +#define SCU_FUN_PIN_USB20_HOST (0x1 << 29)
> > +#define SCU_FUN_PIN_USB11_PORT4 (0x1 << 28)
> > +#define SCU_FUN_PIN_I2C14 (0x1 << 27)
> > +#define SCU_FUN_PIN_I2C13 (0x1 << 26)
> > +#define SCU_FUN_PIN_I2C12 (0x1 << 25)
> > +#define SCU_FUN_PIN_I2C11 (0x1 << 24)
> > +#define SCU_FUN_PIN_I2C10 (0x1 << 23)
> > +#define SCU_FUN_PIN_I2C9 (0x1 << 22)
> > +#define SCU_FUN_PIN_I2C8 (0x1 << 21)
> > +#define SCU_FUN_PIN_I2C7 (0x1 << 20)
> > +#define SCU_FUN_PIN_I2C6 (0x1 << 19)
> > +#define SCU_FUN_PIN_I2C5 (0x1 << 18)
> > +#define SCU_FUN_PIN_I2C4 (0x1 << 17)
> > +#define SCU_FUN_PIN_I2C3 (0x1 << 16)
> > +#define SCU_FUN_PIN_I2C(n) (0x1 << (16 + (n) - 3))
> > +#define SCU_FUN_PIN_MII2_RX_DWN_DIS (0x1 << 15)
> > +#define SCU_FUN_PIN_MII2_TX_DWN_DIS (0x1 << 14)
> > +#define SCU_FUN_PIN_MII1_RX_DWN_DIS (0x1 << 13)
> > +#define SCU_FUN_PIN_MII1_TX_DWN_DIS (0x1 << 12)
> > +
> > +#define SCU_FUN_PIN_MII2_TX_DRIV(x) (x << 10)
> > +#define SCU_FUN_PIN_MII2_TX_DRIV_MASK (0x3 << 10)
> > +#define SCU_FUN_PIN_MII1_TX_DRIV(x) (x << 8)
> > +#define SCU_FUN_PIN_MII1_TX_DRIV_MASK (0x3 << 8)
> >
> > #define MII_NORMAL_DRIV 0x0
> > #define MII_HIGH_DRIV 0x2
> >
> > -#define SCU_FUC_PIN_UART6 (0x1 << 7)
> > -#define SCU_FUC_PIN_ROM_16BIT (0x1 << 6)
> > -#define SCU_FUC_PIN_DIGI_V_OUT(x) (x)
> > -#define SCU_FUC_PIN_DIGI_V_OUT_MASK (0x3)
> > +#define SCU_FUN_PIN_UART6 (0x1 << 7)
> > +#define SCU_FUN_PIN_ROM_16BIT (0x1 << 6)
> > +#define SCU_FUN_PIN_DIGI_V_OUT(x) (x)
> > +#define SCU_FUN_PIN_DIGI_V_OUT_MASK (0x3)
> >
> > #define VIDEO_DISABLE 0x0
> > #define VIDEO_12BITS 0x1
> > #define VIDEO_24BITS 0x2
> > //#define VIDEO_DISABLE 0x3
> >
> > -#define SCU_FUC_PIN_USB11_PORT2 (0x1 << 3)
> > -#define SCU_FUC_PIN_SD1_8BIT (0x1 << 3)
> > +#define SCU_FUN_PIN_USB11_PORT2 (0x1 << 3)
> > +#define SCU_FUN_PIN_SD1_8BIT (0x1 << 3)
> >
> > -#define SCU_FUC_PIN_MAC1_MDIO (0x1 << 2)
> > -#define SCU_FUC_PIN_SD2 (0x1 << 1)
> > -#define SCU_FUC_PIN_SD1 (0x1 << 0)
> > +#define SCU_FUN_PIN_MAC1_MDIO (0x1 << 2)
> > +#define SCU_FUN_PIN_SD2 (0x1 << 1)
> > +#define SCU_FUN_PIN_SD1 (0x1 << 0)
> >
> >
> > /* AST_SCU_FUN_PIN_CTRL6 0x94 - Multi-function Pin
> Control#6*/
> > diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-
> scu.c
> > index 0cc0d67..280c421 100644
> > --- a/arch/arm/mach-aspeed/ast-scu.c
> > +++ b/arch/arm/mach-aspeed/ast-scu.c
> > @@ -394,7 +394,7 @@ void ast_scu_multi_func_eth(u8 num)
> > AST_SCU_FUN_PIN_CTRL1);
> >
> > ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL5) |
> > - SCU_FUC_PIN_MAC1_MDIO,
> > + SCU_FUN_PIN_MAC1_MDIO,
> > AST_SCU_FUN_PIN_CTRL5);
> >
> > break;
> > --
> > 2.8.0.rc3.226.g39d4020
> >
> > _______________________________________________
> > openbmc mailing list
> > openbmc at lists.ozlabs.org
> > https://lists.ozlabs.org/listinfo/openbmc
>
--
*M*axim *S*loyko
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