[PATCH u-boot 01/12] aspeed: add CONFIG_AST_SPI_NOR

[Cédric Le Goater]

also remove some useless code related the host SPI PNOR

Signed-off-by: Cédric Le Goater <clg at kaod.org>
---
 arch/arm/Kconfig             |  2 ++
 arch/arm/mach-aspeed/flash.c | 18 +-----------------
 board/aspeed/Kconfig         |  6 ++++++
 include/configs/ast-common.h |  4 +---
 4 files changed, 10 insertions(+), 20 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 328dc7fe455a..f155d22b1197 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -902,10 +902,12 @@ config TARGET_THUNDERX_88XX
 config TARGET_AST_G5
        bool "Support Apseed fifth generation SoCs"
        select CPU_ARM1176
+       select AST_SPI_NOR
 
 config TARGET_AST_G4
        bool "Support Aspeed fourth generation SoCs"
        select CPU_ARM926EJS
+       select AST_SPI_NOR
 
 endchoice
 
diff --git a/arch/arm/mach-aspeed/flash.c b/arch/arm/mach-aspeed/flash.c
index 9c5ead6fd7ae..01c5354b66d4 100644
--- a/arch/arm/mach-aspeed/flash.c
+++ b/arch/arm/mach-aspeed/flash.c
@@ -1310,7 +1310,7 @@ unsigned long flash_init (void)
 
 	/* Init: FMC  */
 	/* BANK 0 : FMC CS0 , 1: FMC CS1, */
-	for (i = 0; i < CONFIG_FMC_CS; ++i) {
+	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
 		flash_info[i].sysspi = 0;
 		flash_info[i].reg_base = AST_FMC_BASE;
 		flash_info[i].flash_id = FLASH_UNKNOWN;
@@ -1332,22 +1332,6 @@ unsigned long flash_init (void)
 		}
 	}
 
-	/* BANK 2:SYSSPI CS0 */
-#ifdef CONFIG_SPI0_CS
-	//pin switch by trap[13:12]	-- [0:1] Enable SPI Master
-	ast_scu_spi_master(1);	/* enable SPI master */
-	*((volatile ulong*) AST_FMC_SPI0_BASE) |= 0x10000;	/* enable Flash Write */
-	flash_info[CONFIG_FMC_CS].sysspi = 1;
-	flash_info[CONFIG_FMC_CS].reg_base = AST_FMC_SPI0_BASE;
-	flash_info[CONFIG_FMC_CS].flash_id = FLASH_UNKNOWN;
-	flash_info[CONFIG_FMC_CS].CE = 0;
-	size += flash_info[CONFIG_FMC_CS].size = flash_get_size(AST_SPI0_CS0_BASE, &flash_info[CONFIG_FMC_CS]);
-	if (flash_info[2].flash_id == FLASH_UNKNOWN) {
-		printf ("## Unknown FLASH on Bank 2 SYS SPI - Size = 0x%08lx = %ld MB\n",
-			flash_info[CONFIG_FMC_CS].size, flash_info[CONFIG_FMC_CS].size << 20);
-	}
-#endif
-
 	/* Monitor protection ON by default */
 #if (CONFIG_MONITOR_BASE >= AST_FMC_CS0_BASE)
 	flash_protect (FLAG_PROTECT_SET,
diff --git a/board/aspeed/Kconfig b/board/aspeed/Kconfig
index 5d356e297a7d..3dcf1a26d50e 100644
--- a/board/aspeed/Kconfig
+++ b/board/aspeed/Kconfig
@@ -14,3 +14,9 @@ config ASPEED_NET_NCSI
 	bool  "Use a network controller attached via NSCI"
 
 endchoice
+
+config AST_SPI_NOR
+	bool "Enable Aspeed SMC driver"
+	help
+	  Enable Aspeed SMC driver to access the SPI NOR flash of the
+	  BMC
diff --git a/include/configs/ast-common.h b/include/configs/ast-common.h
index b39ea33ce710..81befc66cd62 100644
--- a/include/configs/ast-common.h
+++ b/include/configs/ast-common.h
@@ -86,9 +86,7 @@
 
 #define CONFIG_BOOTARGS			"console=ttyS4,115200n8 root=/dev/ram rw"
 
-#define CONFIG_AST_SPI_NOR    /* AST SPI NOR Flash */
-#define CONFIG_FMC_CS			1
-#define CONFIG_SYS_MAX_FLASH_BANKS 	(CONFIG_FMC_CS)
+#define CONFIG_SYS_MAX_FLASH_BANKS 	1
 #define CONFIG_SYS_MAX_FLASH_SECT	(8192)		/* max number of sectors on one chip */
 #define CONFIG_ENV_IS_IN_FLASH		1
 #define CONFIG_ENV_ADDR			(AST_FMC_CS0_BASE + 0x60000)
-- 
2.7.4