[PATCH qemu 14/38] aspeed/smc: autostrap CE0/1 configuration

Andrew Jeffery andrew at aj.id.au
Fri Nov 25 14:07:17 AEDT 2016


On Fri, 2016-11-18 at 15:21 +0100, Cédric Le Goater wrote:
> HW autodetect type and size of the first and second flash modules of
> the FMC controller.
> 
> Signed-off-by: Cédric Le Goater <clg at kaod.org>

Reviewed-by: Andrew Jeffery <andrew at aj.id.au>

> ---
>  hw/ssi/aspeed_smc.c | 26 +++++++++++++++++++++-----
>  1 file changed, 21 insertions(+), 5 deletions(-)
> 
> diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
> index 1c6c5089f265..72a44150b0a1 100644
> --- a/hw/ssi/aspeed_smc.c
> +++ b/hw/ssi/aspeed_smc.c
> @@ -39,11 +39,14 @@
>  #define   CONF_ENABLE_W2       18
>  #define   CONF_ENABLE_W1       17
>  #define   CONF_ENABLE_W0       16
> -#define   CONF_FLASH_TYPE4     9
> -#define   CONF_FLASH_TYPE3     7
> -#define   CONF_FLASH_TYPE2     5
> -#define   CONF_FLASH_TYPE1     3
> -#define   CONF_FLASH_TYPE0     1
> +#define   CONF_FLASH_TYPE4     8
> +#define   CONF_FLASH_TYPE3     6
> +#define   CONF_FLASH_TYPE2     4
> +#define   CONF_FLASH_TYPE1     2
> +#define   CONF_FLASH_TYPE0     0
> +#define      CONF_FLASH_TYPE_NOR   0x0
> +#define      CONF_FLASH_TYPE_NAND  0x1
> +#define      CONF_FLASH_TYPE_SPI   0x2
>  
>  /* CE Control Register */
>  #define R_CE_CTRL            (0x04 / 4)
> @@ -435,6 +438,19 @@ static void aspeed_smc_reset(DeviceState *d)
>          s->regs[R_SEG_ADDR0 + i] =
>              aspeed_smc_segment_to_reg(&s->ctrl->segments[i]);
>      }
> +
> +    /* CE0 and CE1 HW strapping for FMC controllers : SPI flash type
> +     * and 4BYTE mode
> +     */
> +    if (s->ctrl->segments == aspeed_segments_fmc ||
> +        s->ctrl->segments == aspeed_segments_ast2500_fmc) {
> +        s->regs[s->r_conf] |= (CONF_FLASH_TYPE_SPI <<
> CONF_FLASH_TYPE0);
> +        s->regs[s->r_conf] |= (CONF_FLASH_TYPE_SPI <<
> CONF_FLASH_TYPE1);
> +
> +        /* We should be able to detect the flash size in some ways.
> */
> +        s->regs[s->r_ce_ctrl] |= (1 << (CTRL_EXTENDED0));
> +        s->regs[s->r_ce_ctrl] |= (1 << (CTRL_EXTENDED1));
> +    }
>  }
>  
>  static uint64_t aspeed_smc_read(void *opaque, hwaddr addr, unsigned
> int size)
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