[PATCH linux v3 3/3] arm: dts: Add dt-binding to support ASPEED AST2500 PWM output on zaius
Jaghathiswari Rankappagounder Natarajan
jaghu at google.com
Thu Nov 24 20:26:50 AEDT 2016
The zaius platform has 4 output fans. Add binding data to control the 4 PWM
outputs on ASPEED AST2500 on the zaius platform.
Signed-off-by: Jaghathiswari Rankappagounder Natarajan <jaghu at google.com>
---
v2:
- make the pwmX entries children of the pwm_controller entry.
v3:
- changed/removed some property names to reflect the rules in binding document.
arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 40 ++++++++++++++++++++++++++++++
arch/arm/boot/dts/aspeed-g5.dtsi | 6 +++++
2 files changed, 46 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
index 8ef4ece..0d5960a 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
@@ -43,6 +43,46 @@
gpios = <&gpio ASPEED_GPIO(H, 7) GPIO_ACTIVE_LOW>;
};
};
+
+ pwm: pwm-controller at 1e786000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x1E786000 0x78>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
+ &pinctrl_pwm2_default &pinctrl_pwm3_default>;
+ compatible = "aspeed,ast2500-pwm";
+ clocks = <&pwm_typem_clk>;
+ pwm_typem_period = <95>;
+
+ pwm_port0 {
+ pwm_port = /bits/ 8 <0x00>;
+ pwm_enable = /bits/ 8 <0x01>;
+ pwm_type = /bits/ 8 <0x00>;
+ pwm_fan_ctrl = /bits/ 8 <0xFF>;
+ };
+
+ pwm_port1 {
+ pwm_port = /bits/ 8 <0x01>;
+ pwm_enable = /bits/ 8 <0x01>;
+ pwm_type = /bits/ 8 <0x00>;
+ pwm_fan_ctrl = /bits/ 8 <0xFF>;
+ };
+
+ pwm_port2 {
+ pwm_port = /bits/ 8 <0x02>;
+ pwm_enable = /bits/ 8 <0x01>;
+ pwm_type = /bits/ 8 <0x00>;
+ pwm_fan_ctrl = /bits/ 8 <0xFF>;
+ };
+
+ pwm_port3 {
+ pwm_port = /bits/ 8 <0x03>;
+ pwm_enable = /bits/ 8 <0x01>;
+ pwm_type = /bits/ 8 <0x00>;
+ pwm_fan_ctrl = /bits/ 8 <0xFF>;
+ };
+ };
};
&fmc {
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 433461b..017cbb7 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -967,6 +967,12 @@
reg = <0x1e6e202c 0x4>;
};
+ pwm_typem_clk: fixed_clock0 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <25000>;
+ };
+
sram at 1e720000 {
compatible = "mmio-sram";
reg = <0x1e720000 0x9000>; // 36K
--
2.8.0.rc3.226.g39d4020
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