[PATCH 1/7] arm: aspeed: Remove UART muxing hacks

Andrew Jeffery andrew at aj.id.au
Tue Nov 22 16:14:25 AEDT 2016


On Tue, 2016-11-22 at 14:38 +1030, Joel Stanley wrote:
> These were added during initial bringup. None of these pins are used by
> OpenBMC for the functions they're being muxed to (UART4 nor the VGA
> output) so there are no device tree additions required to cover for
> the removal.
> 
> We do use UART5, which is an exclusive function of the pins it sits on,
> so again no pinmux configuration is required.
> 
> Signed-off-by: Joel Stanley <joel at jms.id.au>

Reviewed-by: Andrew Jeffery <andrew at aj.id.au>

> ---
>  arch/arm/mach-aspeed/aspeed.c | 12 ------------
>  1 file changed, 12 deletions(-)
> 
> diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
> index ce73867aadd4..0e4c34a91ac3 100644
> --- a/arch/arm/mach-aspeed/aspeed.c
> +++ b/arch/arm/mach-aspeed/aspeed.c
> @@ -181,18 +181,6 @@ static void __init aspeed_init_early(void)
> >  	/* Reset AHB bridges */
> >  	writel(0x02, AST_IO(AST_BASE_SCU | 0x04));
>  
> > -	/* Enable UART4 RXD4, TXD4, NRI4, NDCD4, NCTS4 */
> > -	/* TODO: This should be pinmux. Also, why are we enabling uart4? */
> > -	writel(0xcb000000, AST_IO(AST_BASE_SCU | 0x80));
> -
> > -	/* Enable
> > -	 *  - UART1 RXD1, RXD1, NRTS1, NDTR1, NRI1, NDSR1, NDCD1, NCTS1.
> > -	 *  - VGA DDCDAT, DDCCLK, VGAVS, VGAHS.
> > -	 *  - NAND flash FLWP#, FLBUSY#
> > -	 */
> > -	/* TODO: This should be pinmux */
> > -	writel(0x00fff0c0, AST_IO(AST_BASE_SCU | 0x84));
> -
> >  	/* Enables all the clocks except D2CLK, USB1.1 Host, USB1.1, LHCLK */
> >  	writel(0x10CC5E80, AST_IO(AST_BASE_SCU | 0x0c));
>  
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 801 bytes
Desc: This is a digitally signed message part
URL: <http://lists.ozlabs.org/pipermail/openbmc/attachments/20161122/f8ff2e3f/attachment.sig>


More information about the openbmc mailing list