[PATCH 5/7] arm: aspeed: Remove SCU8C hacks

[Joel Stanley]

 - ROM pins were configured but these are unused on Plametto.

These settings were present, but I suspect unused:

 - GPIOR had the pulldown disabled. Most of these pins are unused and
   pulled up on Palmetto.

 - GPIOP is used as BMC_TACH, inputs from a fan controller.

 - GPIOI is the SPI buses for the flash.

 - GPIOH and G are misc I/O.

Signed-off-by: Joel Stanley <joel at jms.id.au>
---
 arch/arm/mach-aspeed/aspeed.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
index ea76c95c33fc..55447123bf39 100644
--- a/arch/arm/mach-aspeed/aspeed.c
+++ b/arch/arm/mach-aspeed/aspeed.c
@@ -45,9 +45,6 @@ static void __init do_common_setup(void)
 	/* Set UART routing */
 	writel(0x00000000, AST_IO(AST_BASE_LPC | 0x9c));
 
-	/* TODO: This should go in the GPIO driver device tree bindings */
-	writel(0xC1C000FF, AST_IO(AST_BASE_SCU | 0x8c));
-
 	/* Setup scratch registers */
 	writel(0x00000042, AST_IO(AST_BASE_LPC | 0x170));
 	writel(0x00008000, AST_IO(AST_BASE_LPC | 0x174));
-- 
2.10.2