[PATCH qemu 11/38] aspeed/smc: get the number of flash modules from hw strapping

Cédric Le Goater clg at kaod.org
Tue Nov 22 00:47:43 AEDT 2016


On 11/21/2016 02:35 PM, Andrew Jeffery wrote:
> On Mon, 2016-11-21 at 14:29 +0100, Cédric Le Goater wrote:
>> On 11/21/2016 02:13 PM, Andrew Jeffery wrote:
>>> On Fri, 2016-11-18 at 15:21 +0100, Cédric Le Goater wrote:
>>>> If the second watchdog is activated, a second flash module is
>>>> available. It should be of the same model.
>>>>
>>>>> Signed-off-by: Cédric Le Goater <clg at kaod.org>
>>>>
>>>> ---
>>>>  hw/arm/aspeed_soc.c | 26 +++++++++++++++++++++++++-
>>>>  1 file changed, 25 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
>>>> index 503efe0f5f77..fcf029f8c1c2 100644
>>>> --- a/hw/arm/aspeed_soc.c
>>>> +++ b/hw/arm/aspeed_soc.c
>>>> @@ -170,12 +170,30 @@ static void aspeed_soc_init(Object *obj)
>>>>                                "ram-size", &error_abort);
>>>>  }
>>>>  
>>>> +static int aspeed_fmc_get_cs(AspeedSoCState *s, Error **errp)
>>>> +{
>>>> +    Error *err = NULL;
>>>> +    uint32_t hw_strap1;
>>>> +
>>>> +    hw_strap1 = object_property_get_int(OBJECT(&s->scu), "hw-strap1", errp);
>>>> +    if (err) {
>>>> +        error_propagate(errp, err);
>>>> +        return -1;
>>>> +    }
>>>> +
>>>> +    /*
>>>> +     * If the second watchdog is activated, then we have two chips.
>>>> +     */
>>>> +    return hw_strap1 & SCU_HW_STRAP_2ND_BOOT_WDT ? 2 : 1;
>>>
>>> Should we instead count the muxed chip selects? We also have FWSPICS2#.
>>>   We would be looking at:
>>>
>>> FWSPICS0#: Dedicated pin, no configuration
>>> FWSPICS1#: SCU88[24]=1 & COND2
>>> FWSPICS2#: SCU88[25]=1 & COND2
>>>
>>> Where COND2 is: SCU94[1:0] = 0
>>
>> Yes I agree. that would be much better for the AST2500 but I don't see 
>> a solution for the AST2400 ? 
>>
> 
> Looks like we count ROMCS[1-4]:
> 
> ROMCS1#: SCU88[24]=1
> ROMCS2#: SCU88[25]=1
> ROMCS3#: SCU88[26]=1
> ROMCS4#: SCU88[27]=1
> 
> Page 113/114.

yes ! 

So we should set or unset these SCU regs when the SoC is created and 
derive the wdt2 enablement from them. I suppose that the helper routine 
to check for the conditions would be under SCU. 

or do we start a simple pinctrl model and slowly add the enablement
of the pins we need ? 

Thanks,

C. 


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