[PATCH qemu 03/38] aspeed: attach the second SPI controller object to the SoC

[Cédric Le Goater]

On 11/21/2016 12:57 PM, Andrew Jeffery wrote:
> On Mon, 2016-11-21 at 22:12 +1030, Joel Stanley wrote:
>>> On Mon, Nov 21, 2016 at 9:33 PM, Andrew Jeffery <andrew at aj.id.au> wrote:
>>> On Fri, 2016-11-18 at 15:21 +0100, Cédric Le Goater wrote:
>>>> Signed-off-by: Cédric Le Goater <clg at kaod.org>
>>>
>>>>> Reviewed-by: Andrew Jeffery <andrew at aj.id.au>
>>>
>>>> ---
>>>>  hw/arm/aspeed_soc.c | 2 +-
>>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>>
>>>> diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
>>>> index db145e201451..bbbbfd13862c 100644
>>>> --- a/hw/arm/aspeed_soc.c
>>>> +++ b/hw/arm/aspeed_soc.c
>>>> @@ -124,7 +124,7 @@ static void aspeed_soc_init(Object *obj)
>>>>      for (i = 0; i < sc->info->spis_num; i++) {
>>>>          object_initialize(&s->spi[i], sizeof(s->spi[i]),
>>>>                            sc->info->spi_typename[i]);
>>>> -        object_property_add_child(obj, "spi", OBJECT(&s->spi[i]), NULL);
>>>> +        object_property_add_child(obj, "spi[*]", OBJECT(&s->spi[i]), NULL);
>>>
>>> Such a curious API. I guess it's effective.
>>
>> I didn't review this one because wtf is with that *?
> 
> According the code it means "keep incrementing a counter until you
> generate a unique object name and successfully register the object".
> AKA the 'i' we already use here, just the API doesn't provide an
> argument to pass it.

yes. see : 

	https://github.com/openbmc/qemu/blob/master/qom/object.c#L910

C.