[PATCH linux dev-4.7 v2 1/1] pinctrl: aspeed: Enable ASPEED pinctrl driver to modify SPI1 strap bits

[Andrew Jeffery]

On Thu, 2016-11-03 at 10:43 -0700, Kun Yi wrote:
> Current pinctrl driver treats HWSTRAP1/HWSTRAP2 bits as read-only.
> Changing SPI1 mode requires pinctrl to modify bit 12 and 13 of HWSTRAP1.
> 
> Signed-off-by: Kun Yi <kunyi at google.com>

Reviewed-by: Andrew Jeffery <andrew at aj.id.au>

Joel: So lets drop your patches to the board file and apply this. We
can switch the devicetrees over to pinctrl_spi1_default later.

Cheers,

Andrew

> ---
>  drivers/pinctrl/aspeed/pinctrl-aspeed.c | 22 ++++++++++++++++++++--
>  drivers/pinctrl/aspeed/pinctrl-aspeed.h |  2 +-
>  2 files changed, 21 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> index 21ef195..ce1399d 100644
> --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> @@ -16,6 +16,8 @@
>  
>  const char *const aspeed_pinmux_ips[] = { "SCU", "SIO", "GFX", "LPC" };
>  
> +#define SPI1_REG_MASK   0x3000
> +
>  int aspeed_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
>  {
>  	struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
> @@ -178,6 +180,7 @@ static bool aspeed_sig_expr_eval(const struct aspeed_sig_expr *expr,
>   *
>   * @return true if the expression is configured as requested, false otherwise
>   */
> +
>  static bool aspeed_sig_expr_set(const struct aspeed_sig_expr *expr,
>  				bool enable, struct regmap *map)
>  {
> @@ -197,15 +200,30 @@ static bool aspeed_sig_expr_set(const struct aspeed_sig_expr *expr,
>  
>  		/*
>  		 * Strap registers are configured in hardware or by early-boot
> -		 * firmware. Treat them as read-only despite that we can write
> +		 * firmware. With the exception of SPI1 interface bits, treat
> +		 * them as read-only despite that we can write
>  		 * them. This may mean that certain functions cannot be
>  		 * deconfigured and is the reason we re-evaluate after writing
>  		 * all descriptor bits.
>  		 */
> -		if (is_scu && (offset == HW_STRAP1 || offset == HW_STRAP2))
> +		if (is_scu && (offset == HW_STRAP2 ||
> +			offset == HW_STRAP1 && !(desc->mask & SPI1_REG_MASK)))
>  			continue;
>  
>  		/*
> +		 * HW_STRAP1 bits can only be set to 0 by writing 1 into
> +		 * bits of same offset in SCU7C. To configure different SPI1
> +		 * modes, we write 1 to SCU7C[13:12] to clear SPI1 mask to make
> +		 * sure later write to strap register can take effect.
> +		 */
> +		if (is_scu && offset == HW_STRAP1 &&
> +		    (desc->mask & SPI1_REG_MASK)) {
> +			ret = regmap_write(map, HW_STRAP1_CLEAR, desc->mask);
> +			if (ret)
> +				return false;
> +		};
> +
> +		/*
>  		 * Sometimes we need help from IP outside the SCU to activate a
>  		 * mux request. Report that we need its cooperation.
>  		 */
> diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.h b/drivers/pinctrl/aspeed/pinctrl-aspeed.h
> index 68315a8..602b260 100644
> --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.h
> +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.h
> @@ -255,6 +255,7 @@
>  #define SCU3C           0x3C /* System Reset Control/Status Register */
>  #define SCU48           0x48 /* MAC Interface Clock Delay Setting */
>  #define HW_STRAP1       0x70 /* AST2400 strapping is 33 bits, is split */
> +#define HW_STRAP1_CLEAR 0x7C /* Bits written 1 to are cleared from HW_STRAP1 */
>  #define SCU80           0x80 /* Multi-function Pin Control #1 */
>  #define SCU84           0x84 /* Multi-function Pin Control #2 */
>  #define SCU88           0x88 /* Multi-function Pin Control #3 */
> @@ -580,5 +581,4 @@ int aspeed_gpio_request_enable(struct pinctrl_dev *pctldev,
>  int aspeed_pinctrl_probe(struct platform_device *pdev,
>  		struct pinctrl_desc *pdesc,
>  		struct aspeed_pinctrl_data *pdata);
> -
>  #endif /* PINCTRL_ASPEED */
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