[linux 2/2] drivers/net/ftgmac100: Adapt for Aspeed SoCs

[Andrew Jeffery]

On Fri, 2016-06-24 at 16:55 +0930, Joel Stanley wrote:
> The RXDES and TXDES registers bits in the ftgmac100 indicates EDO{R,T}R
> at bit position 15 for the Faraday Tech IP. However, the version of this
> IP present in the Aspeed SoCs has these bits at position 30 in the
> registers.
> 
> It appers that ast2400 SoCs support both positions, with the 15th bit
> marked as reserved but still functional. In the ast2500 this bit is
> reused for another function, so we need a work around.
> 
> This was confirmed with engineers from Aspeed that using bit 30 is
> correct for both the ast2400 and ast2500 SoCs.
> 
> Signed-off-by: Joel Stanley <joel at jms.id.au>

Reviewed-by: Andrew Jeffery <andrew at aj.id.au>

> ---
>  drivers/net/ethernet/faraday/ftgmac100.c | 10 ++++++++--
>  1 file changed, 8 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/faraday/ftgmac100.c b/drivers/net/ethernet/faraday/ftgmac100.c
> index 2c2675d6ee3b..e805c4d4c5f8 100644
> --- a/drivers/net/ethernet/faraday/ftgmac100.c
> +++ b/drivers/net/ethernet/faraday/ftgmac100.c
> @@ -1358,8 +1358,14 @@ static int ftgmac100_probe(struct platform_device *pdev)
>  		priv->use_ncsi = false;
>  	}
>  
> -	priv->rxdes0_edorr_mask = BIT(15);
> -	priv->txdes0_edotr_mask = BIT(15);
> +	if (of_machine_is_compatible("aspeed,ast2400") ||
> +	    of_machine_is_compatible("aspeed,ast2500")) {
> +		priv->rxdes0_edorr_mask = BIT(30);
> +		priv->txdes0_edotr_mask = BIT(30);
> +	} else {
> +		priv->rxdes0_edorr_mask = BIT(15);
> +		priv->txdes0_edotr_mask = BIT(15);
> +	}
>  
>  	netdev->ethtool_ops = &ftgmac100_ethtool_ops;
>  	netdev->netdev_ops = &ftgmac100_netdev_ops;
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