[PATCH 2/2] ast2500-edk: Configure HW strap register
Cédric Le Goater
clg at kaod.org
Thu Jul 28 23:40:40 AEST 2016
On 07/28/2016 10:21 AM, Cédric Le Goater wrote:
> On 07/28/2016 03:25 AM, Andrew Jeffery wrote:
>> Strap register value was read off the hardware after boot.
>>
>> Signed-off-by: Andrew Jeffery <andrew at aj.id.au>
>> ---
>> hw/arm/palmetto-bmc.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/hw/arm/palmetto-bmc.c b/hw/arm/palmetto-bmc.c
>> index ec4aed306e7b..9e9c7e403133 100644
>> --- a/hw/arm/palmetto-bmc.c
>> +++ b/hw/arm/palmetto-bmc.c
>> @@ -47,7 +47,7 @@ enum {
>> static const AspeedBoardConfig aspeed_boards[] = {
>> [PALMETTO_BMC] = { AST2400_HW_STRAP1, AST2400_A0_SILICON_REV,
>> AST2400_SDRAM_BASE },
>> - [AST2500_EDK] = { 0x00000200, AST2500_A1_SILICON_REV,
>> + [AST2500_EDK] = { 0x7100c2e6, AST2500_A1_SILICON_REV,
>> AST2500_SDRAM_BASE },
>
> so maybe we could define the ast2500 hw-strap1 value in :
>
> include/hw/misc/aspeed_scu.h,
>
> comments are sufficient enough. So you can replace the version I did
> for the ast2400. We can always come back to the macros when the u-boot
> code is merged.
So after a second look, I think macros are better.
The ast2500 eval board has a HW_STRAP1 value of 0xf100c2e6, so I came up
with a definition of AST2500_HW_STRAP1 which is below.
Cheers,
C.
+/*
+ * Hardware strapping register definition (for Aspeed AST2500 SOC and
+ * higher)
+ */
+#define SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE (0x1 << 31)
+#define SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE (0x1 << 30)
+#define SCU_AST2500_HW_STRAP_UART_DEBUG (0x1 << 29)
+#define UART_DEBUG_UART1 0
+#define UART_DEBUG_UART5 1
+#define SCU_AST2500_HW_STRAP_RESERVED28 (0x1 << 28)
+
+#define SCU_AST2500_HW_STRAP_FAST_RESET_DBG (0x1 << 27)
+#define SCU_AST2500_HW_STRAP_ESPI_FLASH_ENABLE (0x1 << 26)
+#define SCU_AST2500_HW_STRAP_ESPI_ENABLE (0x1 << 25)
+#define SCU_AST2500_HW_STRAP_DDR4_ENABLE (0x1 << 24)
+
+#define SCU_AST2500_HW_STRAP_ACPI_ENABLE (0x1 << 19)
+#define SCU_AST2500_HW_STRAP_USBCKI_FREQ (0x1 << 18)
+#define USBCKI_FREQ_24MHZ 0
+#define USBCKI_FREQ_28MHZ 1
+
+#define SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(x) (x << 9)
+#define SCU_AST2500_HW_STRAP_GET_AXI_AHB_RATIO(x) ((x >> 9) & 7)
+#define SCU_AST2500_HW_STRAP_CPU_AXI_RATIO_MASK (0x7 << 9)
+#define AXI_AHB_RATIO_UNDEFINED 0
+#define AXI_AHB_RATIO_2_1 1
+#define AXI_AHB_RATIO_3_1 2
+#define AXI_AHB_RATIO_4_1 3
+#define AXI_AHB_RATIO_5_1 4
+#define AXI_AHB_RATIO_6_1 5
+#define AXI_AHB_RATIO_7_1 6
+#define AXI_AHB_RATIO_8_1 7
+
+#define SCU_AST2500_HW_STRAP_RESERVED1 (0x1 << 1)
+#define SCU_AST2500_HW_STRAP_DIS_BOOT (0x1 << 0)
+
+#define AST2500_HW_STRAP1_DEFAULTS ( \
+ SCU_AST2500_HW_STRAP_RESERVED28 | \
+ SCU_HW_STRAP_2ND_BOOT_WDT | \
+ SCU_HW_STRAP_VGA_CLASS_CODE | \
+ SCU_HW_STRAP_LPC_RESET_PIN | \
+ SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \
+ SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
+ SCU_AST2500_HW_STRAP_RESERVED1)
+
+#define AST2500_HW_STRAP1 (( \
+ AST2500_HW_STRAP1_DEFAULTS | \
+ SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
+ SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
+ SCU_AST2500_HW_STRAP_UART_DEBUG | \
+ SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
+ SCU_HW_STRAP_MAC1_RGMII | \
+ SCU_HW_STRAP_MAC0_RGMII) & \
+ ~SCU_HW_STRAP_2ND_BOOT_WDT)
+
#endif /* ASPEED_SCU_H */
More information about the openbmc
mailing list