[PATCH linux] Fix the incorrect debounce setting on power button

[OpenBMC Patches]

PCLK divider selection is decided by SCU08[25:23] and the value is 011b
on Barreleye.
That means PCLK should be H-PLL/8=384MHz/8=48MHz, but the current
debounce timer value was computed by 24MHz.
So the correct value should be 20ms*48000000/1000=EA600h

Signed-off-by: johnhcwang <hsienchiang at gmail.com>

https://github.com/openbmc/linux/pull/97

johnhcwang (1):
  Fix the incorrect debounce setting on power button

 arch/arm/mach-aspeed/aspeed.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

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2.9.0