[PATCH uboot v2016.05-aspeed-openbmc] aspeed/ast-g4: disables D2-PLL and force UART configuration at reboot

[Cédric Le Goater]

The serial configuration could probably be done in a u-boot serial
driver. Disabling D2-PLL is also required but I am not sure where to
put it.

Based on :

      https://github.com/openbmc/u-boot/commit/4b44678c11ac82c7c797bb115e276181752ad54d
      
Signed-off-by: Cédric Le Goater <clg at kaod.org>
---
 board/aspeed/ast-g4/platform.S |   70 +++++++++++++++++++++++------------------
 1 file changed, 40 insertions(+), 30 deletions(-)

Index: u-boot-v2016.05-aspeed-openbmc.git/board/aspeed/ast-g4/platform.S
===================================================================
--- u-boot-v2016.05-aspeed-openbmc.git.orig/board/aspeed/ast-g4/platform.S
+++ u-boot-v2016.05-aspeed-openbmc.git/board/aspeed/ast-g4/platform.S
@@ -166,6 +166,45 @@ PATTERN_TABLE:
     ldr r2, =0x00000800
     .endm
 
+    .macro init_uart
+    /* Disable D2-PLL */
+    ldr r0, =0x1e6e202c
+    ldr r1, =0x00000010
+    str r1, [r0]
+    /* Setting the 7th bit of UART LCR to 1 gives access to the
+     * divisor latches
+     */
+    ldr r0, =0x1e78400c
+    mov r1, #0x83
+    str r1, [r0]
+    /* check SCU_MISC1 for div13 enablement */
+    ldr r0, =0x1e6e202c
+    ldr r2, [r0]
+    mov r2, r2, lsr #12
+    tst r2, #0x01
+    /* configure baudrate */
+    ldr r0, =0x1e784000
+    moveq r1, #0x0D                              @ Baudrate 115200
+    movne r1, #0x01                              @ Baudrate 115200, div13
+#if defined(CONFIG_DRAM_UART_38400)
+    moveq r1, #0x27                              @ Baudrate 38400
+    movne r1, #0x03                              @ Baudrate 38400 , div13
+#endif
+    str r1, [r0]
+    /* interrupt settings */
+    ldr r0, =0x1e784004
+    mov r1, #0x00
+    str r1, [r0]
+    /* 8N1 */
+    ldr r0, =0x1e78400c
+    mov r1, #0x03
+    str r1, [r0]
+    /* baudrate is configured. restore LCR */
+    ldr r0, =0x1e784008
+    mov r1, #0x07
+    str r1, [r0]
+    .endm
+
 /******************************************************************************
  Calibration Macro End
  ******************************************************************************/
@@ -187,6 +226,7 @@ LPC_Patch_E:
 
 .globl lowlevel_init
 lowlevel_init:
+    init_uart
 
 init_dram:
     /* save lr */
@@ -336,36 +376,6 @@ set_MPLL:
     and r1, r2, r1
     str r1, [r0]
 
-/* Debug - UART console message */
-    ldr r0, =0x1e78400c
-    mov r1, #0x83
-    str r1, [r0]
-
-    ldr r0, =0x1e6e202c
-    ldr r2, [r0]
-    mov r2, r2, lsr #12
-    tst r2, #0x01
-    ldr r0, =0x1e784000
-    moveq r1, #0x0D                              @ Baudrate 115200
-    movne r1, #0x01                              @ Baudrate 115200, div13
-#if defined(CONFIG_DRAM_UART_38400)
-    moveq r1, #0x27                              @ Baudrate 38400
-    movne r1, #0x03                              @ Baudrate 38400 , div13
-#endif
-    str r1, [r0]
-
-    ldr r0, =0x1e784004
-    mov r1, #0x00
-    str r1, [r0]
-
-    ldr r0, =0x1e78400c
-    mov r1, #0x03
-    str r1, [r0]
-
-    ldr r0, =0x1e784008
-    mov r1, #0x07
-    str r1, [r0]
-
     ldr r0, =0x1e784000
     mov r1, #0x0D                                @ '\r'
     str r1, [r0]