[RFC linux 0/2] spi: aspeed: generic spi master
Brendan Higgins
brendanhiggins at google.com
Wed Dec 7 10:36:01 AEDT 2016
Some time ago we mentioned we are interested in a generic spi master for use
with some sensors that were not flash chips; that was some time ago so I do not
expect anyone to remember. Anyway, I implemented an initial version.
I stole the *read_from_ahb/*write_to_ahb methods for the spi nor driver; so we
should consider, at the very least putting those in a common library, but I
think we could probably share even more code between the implementations: the
m25p80 mtd spi driver provides an mtd interface given a spi master; so we might
want to consider rolling the spi-nor and spi-master into the same driver.
I am especially looking for feedback on how I did the multiple io port ranges;
currently, I require two address ranges to be given, in addition to the address
ranges for the control registers, one for each chip select. Obviously, this does
not completely work for the fmc spi master, as it has three chip selects and
three coresponding io port regions. I was thinking that I should not require all
the io port regions to be specified and then just limit the available number of
chip selects, but that is kind of messy for someone who wants to use the third
chip select, when there is nothing on the second chip select.
Not yet implmented:
- DMA support: we are not interested in it at this time and it probably does
not belong in an initial version anyway, but I could implement it in a future
version if someone really wants it.
- AST24XX support: we are not using the chip and do not have any copies to test
on, so I have not implmented anything for it; again, I do not mind adding
support for this, but I will probably need someone's help.
- clock interface: currently, we do not have an interface for the AHB clock,
so there is no clock interface for the spi master to use; the current spi-nor
appears to be in the same place. I do not think we have much control over
this clock; even so, should we implement a fixed frequency clock as we have
done for the lower speed peripherals?
I have tested this on the AST2500 evaluation board.
Brendan Higgins (2):
spi: aspeed: added generic spi master for Aspeed
spi: aspeed: added device tree documentation
.../devicetree/bindings/spi/spi-aspeed.txt | 33 ++
drivers/spi/Kconfig | 12 +
drivers/spi/Makefile | 1 +
drivers/spi/spi-aspeed.c | 582 +++++++++++++++++++++
4 files changed, 628 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-aspeed.txt
create mode 100644 drivers/spi/spi-aspeed.c
--
2.8.0.rc3.226.g39d4020
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