[PATCH linux 3/3] watchdog/aspeed_wdt: Set system reset mode to 'full chip'

[Joel Stanley]

On Fri, Oct 23, 2015 at 4:29 AM, OpenBMC Patches <patches at stwcx.xyz> wrote:
> From: Jeremy Kerr <jk at ozlabs.org>
>
> Currently, the watchdog timer does nothing on expiry - the 'SoC system'
> reset type doesn't seem to have any effect.
>
> This change uses the 'full chip' reset type instead.

Do we understand why this resolved the issue?

The previous code was working before, and the BSP from Aspeed uses
WDT_CTRL_RESET_SYSTEM | WDT_CTRL_ENABLE ( == 3) for this register as
well.
>
>  static void aspeed_wdt_enable(struct aspeed_wdt *wdt, int count)
>  {
> -       u32 ctrl = WDT_CTRL_RESET_SYSTEM | WDT_CTRL_ENABLE;
> +       u32 ctrl = WDT_CTRL_RESET_MODE_FULL_CHIP | WDT_CTRL_RESET_SYSTEM |
> +               WDT_CTRL_ENABLE;
>
>         writel(0, wdt->base + WDT_CTRL);
>         writel(count, wdt->base + WDT_RELOAD_VALUE);