[PATCH linux] Temporary AST setup for Palmetto and Barreleye
Joel Stanley
joel at jms.id.au
Thu Dec 10 14:15:43 AEDT 2015
On Wed, Dec 9, 2015 at 6:10 PM, OpenBMC Patches
<openbmc-patches at stwcx.xyz> wrote:
> From: Norman James <njames at us.ibm.com>
>
> Removed when pinmux driver is ready.
Thanks Norm. Merged as 6da1b0f7943571e825ad06b3cdb990472cc07d2b.
I've got a question below.
> +static void __init do_common_setup(void)
> +{
> + u32 reg;
This is unused. I fixed it for you.
> +
> + /* Enable LPC FWH cycles, Enable LPC to AHB bridge */
> + writel(0x00000500, AST_IO(AST_BASE_LPC | 0x80));
> +static void __init do_barreleye_setup(void)
> +{
> + u32 reg;
> + do_common_setup();
> +
> + /* Setup PNOR address mapping for 64M flash */
> + writel(0x30000C00, AST_IO(AST_BASE_LPC | 0x88));
> + writel(0xFC0003FF, AST_IO(AST_BASE_LPC | 0x8C));
> +
> + /* GPIO setup */
> + writel(0x9E82FCE7, AST_IO(AST_BASE_GPIO | 0x00));
> + writel(0x0370E677, AST_IO(AST_BASE_GPIO | 0x04));
> +
> + /*
> + * Do read/modify/write on power gpio
> + * to prevent resetting power on reboot
> + */
Can you explain to me why we need to do this?
> + reg = readl(AST_IO(AST_BASE_GPIO | 0x20));
> + reg |= 0xCFC8F7FD;
> + writel(reg, AST_IO(AST_BASE_GPIO | 0x20));
> + writel(0xC738F20A, AST_IO(AST_BASE_GPIO | 0x24));
> + writel(0x0031FFAF, AST_IO(AST_BASE_GPIO | 0x80));
> +}
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