[PATCH] Document Linux's memory barriers [try #2]

[Jesse Barnes]

On Wednesday, March 08, 2006 7:45 pm, Paul Mackerras wrote:
> If we can have the following rules:
>
> * If you have stores to regular memory, followed by an MMIO store,
> and you want the device to see the stores to regular memory at the
> point where it receives the MMIO store, then you need a wmb() between
> the stores to regular memory and the MMIO store.
>
> * If you have PIO or MMIO accesses, and you need to ensure the
>   PIO/MMIO accesses don't get reordered with respect to PIO/MMIO
>   accesses on another CPU, put the accesses inside a spin-locked
>   region, and put a mmiowb() between the last access and the
>   spin_unlock.
>
> * smp_wmb() doesn't necessarily do any ordering of MMIO accesses
>   vs. other accesses, and in that sense it is weaker than wmb().

This is a good set of rules.  Hopefully David can add something like 
this to his doc.

> ... then I can remove the sync from write*, which would be nice, and
> make mmiowb() be a sync.  I wonder how long we're going to spend
> chasing driver bugs after that, though. :)

Hm, a static checker should be able to find this stuff, shouldn't it?

Jesse