[RFC] powerpc: cell interrupt controller updates

[Arnd Bergmann]

Am Dienstag, 17. Januar 2006 22:35 schrieb Benjamin Herrenschmidt:
> The patch alone isn't very "talking" to me. Could you write down the
> kind of HW setup you have and how you expressed that in the
> device-tree ?

Most of the discussion was between Jens and Hartmut, but I'll try to
explain as much as I can remember from it. Jens, please correct me
on this.

The physical setup on the board is roughly like this

	CBE  -  CBE
         |       |
       spider  spider-ide0
         |       |
        eth1    eth0

Each Cell Broadband Engine (CBE) has two SMT threads, that each have their
own interrupt controller registers for the Internal Interrupt Controller 
(IIC). Each of the two spider chips has an external interrupt controller 
(spiderpic) that can receive interrupts from an I/O device and forward
those to exactly one of the four SMT threads (unlike e.g. mpic which AFAIU
makes an interrupt pending at up to four CPUs simultaneously).

We now represent all this in the device tree as four separate interrupt 
controller nodes:

/interrupt-controller at 20000002000/
	/type "interrupt-controller"
	/reg "20000002020 20 20000002040 20"
	/compatible "IBM,CBEA-Internal-Interrupt-Controller"
	/ibm,interrupt-server-ranges "0 1"
/interrupt-controller at 30000002000/
	/type "interrupt-controller"
	/reg "30000002020 20 30000002040 20"
	/compatible "IBM,CBEA-Internal-Interrupt-Controller"
	/ibm,interrupt-server-ranges "2 3"
/interrupt-controller at 24000008000/
	/type "interrupt-controller"
	/reg "24000008000 800"
	/compatible "CBEA,platform-spider-pic"
	/interrupt-parent phandleof("/interrupt-controller at 20000002000")
/interrupt-controller at 34000008000/
	/type "interrupt-controller"
	/reg "34000008000 800"
	/compatible "CBEA,platform-spider-pic"
	/interrupt-parent phandleof("/interrupt-controller at 30000002000")
/cpus/
	/cpu at 20000000000/
		/ibm,ppc-interrupt-server#s "0 1"
		/interrupt-parent phandleof("/interrupt-controller at 20000002000")
	/cpu at 30000000000/
		/ibm,ppc-interrupt-server#s "2 3"
		/interrupt-parent phandleof("/interrupt-controller at 30000002000")

The above is all from memory, so it's likely to be wrong in details. The 
'ibm,ppc-interrupt-server#s' property of the CPU is used as the 
hard-processor-id in linux and also matched with the 
'ibm,interrupt-server-ranges' of the 'IBM,CBEA-Internal-Interrupt-Controller' 
node. It is used as an index into the 'reg' properties of the interrupt 
controller to find the actual registers for one SMT thread.

The interrupt-parent relationship between the spider and iic controllers
is just an approximation, each spider pic can also send interrupts to any
other interrupt controller in the system (all six of them, if you count
the SMT threads as separate interrupt targets), but for best performance, it
is usually wise to use local interrupt delivery.

	Arnd <><