[PATCH] powerpc: Fix runlatch performance issues

Benjamin Herrenschmidt benh at kernel.crashing.org
Sun Feb 26 08:36:14 EST 2006


On Fri, 2006-02-24 at 05:02 +0000, Linux Kernel Mailing List wrote:
> commit cb2c9b2741346eb23b177187a51ff5abf08295bd
> tree 31433b46f96a00e22ca7e8402fd0bfe1fea3408d
> parent 47f78a49206b7f9b0d283ba46a2a5a6ee1796472
> author Anton Blanchard <anton at samba.org> Mon, 13 Feb 2006 14:48:35 +1100
> committer Paul Mackerras <paulus at samba.org> Fri, 24 Feb 2006 11:36:31 +1100
> 
> [PATCH] powerpc: Fix runlatch performance issues
> 
> The runlatch SPR can take a lot of time to write. My original runlatch
> code would set it on every exception entry even though most of the time
> this was not required. It would also continually set it in the idle
> loop, which is an issue on an SMT capable processor.
> 
> Now we cache the runlatch value in a threadinfo bit, and only check for
> it in decrementer and hardware interrupt exceptions as well as the idle
> loop. Boot on POWER3, POWER5 and iseries, and compile tested on pmac32.

I very much dislike the unconditional bl to C code in the exception
path. Can you at least wrap it in asm cpu feature conditionals on
CPU_FTR_CTRL so that it gets NOP'ed out on CPUs without a runlatch ? In
addition, we should probably not set that feature bit from the cputable
but from the platform code so that it's only set on machines where it's
useful, thus causing the code to be NOP'ed out on G5s and other bare
metal stuff that don't care about the runlatch no ?

Ben.





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