Four level pagetables, now with hugepages

[Milton Miller]

On Mon May 16 14:43:53 EST 2005, David Gibson wrote:
> ===================================================================
> --- working-2.6.orig/arch/ppc64/kernel/head.S   2005-05-13 
> 17:57:38.000000000 +1000
> +++ working-2.6/arch/ppc64/kernel/head.S        2005-05-13 
> 17:57:39.000000000 +1000
> @@ -38,6 +38,7 @@
>  #include <asm/cputable.h>
>  #include <asm/setup.h>
>  #include <asm/hvcall.h>
> +#include <asm/pgtable.h>
>
>  #ifdef CONFIG_PPC_ISERIES
>  #define DO_SOFT_DISABLE
> @@ -2117,17 +2118,17 @@
>  empty_zero_page:
>         .space  4096
>
> -       .globl  swapper_pg_dir
> -swapper_pg_dir:
> -       .space  4096
> -
>  #ifdef CONFIG_SMP
>  /* 1 page segment table per cpu (max 48, cpu0 allocated at 
> STAB0_PHYS_ADDR) */
>         .globl  stab_array
>  stab_array:
>         .space  4096 * 48
>  #endif
> -
> +
> +       .globl  swapper_pg_dir
> +swapper_pg_dir:
> +       .space  PAGE_SIZE
> +
>  /*
>   * This space gets a copy of optional info passed to us by the 
> bootstrap
>   * Used to pass parameters into the kernel like root=/dev/sda1, etc.

Does this change to PAGE_SIZE need to be > 4k aligned?   If so we
shouuld define a new linker section.

milton