Help text for memory model config section?

Anton Blanchard anton at
Thu Jul 7 05:32:38 EST 2005

Hi Joel,

While I remember, I noticed this:

 * SECTION_SIZE_BITS            2^N: how big each section will be
 * MAX_PHYSADDR_BITS            2^N: how much physical address space we
 * have
 * MAX_PHYSMEM_BITS             2^N: how much memory we can have in that
 * space
#define SECTION_SIZE_BITS       24
#define MAX_PHYSADDR_BITS       38
#define MAX_PHYSMEM_BITS        36

At the moment our LMBs are 16MB in size, so SECTION_SIZE_BITS looks ok.
However we can have up to 2TB with our current setup (41 bits).

On a shared processor box we may end up with all memory in a single
node, so I think it should look like:

#define SECTION_SIZE_BITS       24
#define MAX_PHYSADDR_BITS       41
#define MAX_PHYSMEM_BITS        41

But I wonder if some structures in sparse.c will grow too large with this
change. In the ppc64 numa code we decided to allocate the memory lookup
table (which contains a node id per 16MB region) at runtime. Otherwise
we had a 256kB array in all kernels.

FYI we might be going to 16TB soon.


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