gcc 4.0 compiles kernel with altivec

[Benjamin Herrenschmidt]

On Thu, 2005-02-17 at 15:48 +0100, Segher Boessenkool wrote:
> >>> I can imagine userland apps causing a severe hit on context switch 
> >>> time
> >>> bcs they all start using altivec and cause the kernel to have to swap
> >>> 32x128bits registers... I've been thinking about using vrsave to 
> >>> break
> >>> the save/restore code into 2 or 4 parts and only save the ones that 
> >>> need
> >>> to be saved. (It's an ABI thing anyway)
> >>
> >> Yes, you should definitely do this..
> >
> > Yup, will probably do when I have some time, I need to bench the whole
> > stuff though.
> 
> Last time I benchmarked it (on 970), it was best to test per group of
> 4 to 8 registers (bigger was worse, smaller was worse).  This was an
> artificial benchmark though, real usage patterns might skew the results
> a bit.  Anyway, between 4 to 8 the graph was quite flat.
> 

Ah good !

I'm curious how much registers are used by common gcc constructs using
altivec implicitely (and possibly altivec-optimized memcpy & co that
I'll put in the vdso eventually). That will probably be the key
threshold.

Ben.