[PATCH 11/12] ppc64: Move fwnmi vectors into trampoline area

[Milton D. Miller II]

Michael Ellerman wrote:

> The fwnmi vectors can be anywhere < 32 MB, so we need to use a trampoline
> for them too. We've got plenty of room below 0x3000, so just plonk them in
> there and the existing trampoline code will do what we want. If we ever
> run out of space below 0x3000 we can change the code to patch the fwnmi
> vectors explictly.


1) Addresses below 0x3000 are reserved by the (processor?) architecture
to add interrupt vectors.  This patch might collide with them.

2) Without making sure the old and new vecotors are at the same place,
the call may not succeed.

3) We are going to call rtas to register these vectors again.


I would much prefer we test that rtas handles us calling register again
with a different address to move the vector addresses.

(We need to test Power4 SMP, LPAR, and Power5.  I don't expect problems).

milton



>
> Signed-off-by: Michael Ellerman <michael at ellerman.id.au>
> ---
>
>  arch/ppc64/kernel/head.S          |   37 ++++++++++++++++++++-----------------
>  arch/ppc64/kernel/pSeries_setup.c |   14 +++++++++-----
>  2 files changed, 29 insertions(+), 22 deletions(-)
>
> Index: work/arch/ppc64/kernel/head.S
> ===================================================================
> --- work.orig/arch/ppc64/kernel/head.S
> +++ work/arch/ppc64/kernel/head.S
> @@ -494,6 +494,26 @@ system_call_pSeries:
>  	STD_EXCEPTION_PSERIES(0x1300, instruction_breakpoint)
>  	STD_EXCEPTION_PSERIES(0x1700, altivec_assist)
>  
> +	/*
> +	 * Vectors for the FWNMI option.  Share common code.
> +	 * For kdump's sake these must be < 0x3000 and 8-byte aligned.
> +	 */
> +	.align 7
> +	.globl system_reset_fwnmi
> +system_reset_fwnmi:
> +	HMT_MEDIUM
> +	mtspr   SPRG1,r13               /* save r13 */
> +	RUNLATCH_ON(r13)
> +	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common)
> +
> +	.align 7
> +	.globl machine_check_fwnmi
> +machine_check_fwnmi:
> +	HMT_MEDIUM
> +	mtspr   SPRG1,r13               /* save r13 */
> +	RUNLATCH_ON(r13)
> +	EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
> +
>  	. = 0x3000
>  
>  /*** pSeries interrupt support ***/
> @@ -507,23 +527,6 @@ _GLOBAL(do_stab_bolted_pSeries)
>  	mfspr	r12,SPRG2
>  	EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_stab_bolted)
>  
> -/*
> - * Vectors for the FWNMI option.  Share common code.
> - */
> -      .globl system_reset_fwnmi
> -system_reset_fwnmi:
> -      HMT_MEDIUM
> -      mtspr   SPRG1,r13               /* save r13 */
> -      RUNLATCH_ON(r13)
> -      EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common)
> -
> -      .globl machine_check_fwnmi
> -machine_check_fwnmi:
> -      HMT_MEDIUM
> -      mtspr   SPRG1,r13               /* save r13 */
> -      RUNLATCH_ON(r13)
> -      EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
> -
>  #ifdef CONFIG_PPC_ISERIES
>  /***  ISeries-LPAR interrupt handlers ***/
>  
> Index: work/arch/ppc64/kernel/pSeries_setup.c
> ===================================================================
> --- work.orig/arch/ppc64/kernel/pSeries_setup.c
> +++ work/arch/ppc64/kernel/pSeries_setup.c
> @@ -108,14 +108,18 @@ void pSeries_get_cpuinfo(struct seq_file
>   */
>  static void __init fwnmi_init(void)
>  {
> -	int ret;
> +	unsigned long v1, v2;
> +
>  	int ibm_nmi_register = rtas_token("ibm,nmi-register");
>  	if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
>  		return;
> -	ret = rtas_call(ibm_nmi_register, 2, 1, NULL,
> -			__pa((unsigned long)system_reset_fwnmi),
> -			__pa((unsigned long)machine_check_fwnmi));
> -	if (ret == 0)
> +
> +	/* We point the firmware at low addresses, and use a trampoline to
> +	 * get up to the real code at KERNELBASE. */
> +	v1 = (unsigned long)system_reset_fwnmi - KERNELBASE;
> +	v2 = (unsigned long)machine_check_fwnmi - KERNELBASE;
> +
> +	if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, v1, v2))
>  		fwnmi_active = 1;
>  }
>  
>