[PATCH 7/8] Tweak comments in ppc64 head.S

[David Gibson]

This patch adjust some comments in head.S for accuracy, clarity, and
spelling.

Signed-off-by: David Gibson <dwg at au1.ibm.com>

 arch/ppc64/kernel/head.S |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

Index: working-2.6/arch/ppc64/kernel/head.S
===================================================================
--- working-2.6.orig/arch/ppc64/kernel/head.S	2005-07-28 14:23:22.000000000 +1000
+++ working-2.6/arch/ppc64/kernel/head.S	2005-07-28 14:23:24.000000000 +1000
@@ -147,7 +147,7 @@
 	std	r24,__secondary_hold_acknowledge at l(0)
 	sync
 
-	/* All secondary cpu's wait here until told to start. */
+	/* All secondary cpus wait here until told to start. */
 100:	ld	r4,__secondary_hold_spinloop at l(0)
 	cmpdi	0,r4,1
 	bne	100b
@@ -702,8 +702,8 @@
  * R9 contains the saved CR, r13 points to the paca,
  * r10 contains the (bad) kernel stack pointer,
  * r11 and r12 contain the saved SRR0 and SRR1.
- * We switch to using the paca guard page as an emergency stack,
- * save the registers there, and call kernel_bad_stack(), which panics.
+ * We switch to using an emergency stack, save the registers there,
+ * and call kernel_bad_stack(), which panics.
  */
 bad_stack:
 	ld	r1,PACAEMERGSP(r13)
@@ -1302,7 +1302,7 @@
 	b	.kexec_wait		/* next kernel might do better	 */
 
 2:	mtspr	SPRG3,r13		/* Save vaddr of paca in SPRG3	 */
-	/* From now on, r24 is expected to be logica cpuid */
+	/* From now on, r24 is expected to be logical cpuid */
 	mr	r24,r5
 3:	HMT_LOW
 	lbz	r23,PACAPROCSTART(r13)	/* Test if this processor should */