[PATCH 1/1] ppc64: Block config accesses during BIST
paulus at samba.org
Fri Oct 22 13:49:48 EST 2004
Brian King writes:
> Some PCI adapters on pSeries and iSeries hardware (ipr scsi adapters)
> have an exposure today in that they issue BIST to the adapter to reset
> the card. If, during the time it takes to complete BIST, userspace attempts
> to access PCI config space, the host bus bridge will master abort the access
> since the ipr adapter does not respond on the PCI bus for a brief period of
> time when running BIST. This master abort results in the host PCI bridge
> isolating that PCI device from the rest of the system, making the device
> unusable until Linux is rebooted. This patch is an attempt to close that
> exposure by introducing some blocking code in the arch specific PCI code.
> The intent is to have the ipr device driver invoke these routines to
> prevent userspace PCI accesses from occurring during this window.
> It has been tested by running BIST on an ipr adapter while running a
> script which looped reading the config space of that adapter through sysfs.
> Without the patch, an EEH error occurrs. With the patch there is no EEH
> error. Tested on Power 5 and iSeries Power 4.
The general idea seems fine to me. There are a couple of things I
don't like about the patch though:
(1) I don't see why we need separate implementations of
pci_block_config_io, pci_unblock_config_io and pci_start_bist for
iSeries and for the rest. (Maybe that just points up that we
still have gratuitous differences between the iSeries and
non-iSeries PCI code.)
(2) I don't think we need to add a spinlock to the device node
structure. A single global spinlock should suffice, particularly
since we get serialized on the RTAS call anyway, and therefore
there is no incentive to try to provide parallelism at the higher
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