power4 performance counters

Anton Blanchard anton at samba.org
Tue Nov 30 08:49:14 EST 2004

> Is there a publicly available document that specifies the events
> countable on power4 performance counters?  I found POWER4.evs on an AIX
> box (part of pmapi library), but I would like to write my own code that
> accesses those counters on linux, and incorporating that information
> probably violates IBM copyright.

oprofile has a summary of the common groups for POWER4, POWER5 and 970.
It supports hardware counters on recent 2.6 kernels. You may need to get
take a CVS snapshot of oprofile, its fairly recent.

For a background of how the performance counters work in POWER4/5 and
970 (the concepts are the same even though the muxes are different),
check out the 970FX book4:


Let me know if you get stuck. Just out of interest, are you planning to 
work on one of the performance counter packages (eg pmapi, perfctr)

BTW the performance counter registers (PMC*, MMCR*) are exported in
2.6 in sysfs (/sys/devices/system/cpu/cpu*), you can read and write each
cpu via that. They are only 32bit so you need to read them periodically
if you are doing it all from userspace (eg do it a few times a second to
check for wrap).

There is a userspace mfspr instruction to grab the PMC values from
userspace so you can avoid hitting the kernel on reads if you want to
do low overhead stuff in userspace.


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