[PATCH] FIx for mtmsrd instruction decode in KDB.

[Nitin Vashisth]

Hi,

This patch fixes the mtmsrd instruction decode in kdb using logic
similar to that in xmon to decode the instruction.


Best Regards,
Nitin.
--
Nitin Vashisth
Linux Technology Center
IBM Software Lab
Bangalore, INDIA

Direct 91-80-2504 4611
Board 91-80-2526 2355 / 7117 Extension 3611.

-- org/ameslab/arch/ppc64/kdb/ppc-opc.c 2004-04-22 21:52:09.000000000
-0700
+++ ameslab/arch/ppc64/kdb/ppc-opc.c 2004-05-11 11:30:36.000000000 -0700
@@ -82,6 +82,12 @@
static long extract_spr PARAMS ((unsigned long, int *));
static unsigned long insert_tbr PARAMS ((unsigned long, long, const char
**));
static long extract_tbr PARAMS ((unsigned long, int *));
+static unsigned long insert_ev2 (unsigned long, long, const char **);
+static long extract_ev2 (unsigned long, int *);
+static unsigned long insert_ev4 (unsigned long, long, const char **);
+static long extract_ev4 (unsigned long, int *);
+static unsigned long insert_ev8 (unsigned long, long, const char **);
+static long extract_ev8 (unsigned long, int *);

/* The operands table.

@@ -436,6 +442,32 @@
   /* The SHB field in a VA form instruction. */
#define SHB UIMM + 1
   { 4, 6, 0, 0, 0 },
+
+  /* The other UIMM field in a EVX form instruction.  */
+#define EVUIMM SHB + 1
+  { 5, 11, 0, 0, 0 },
+
+  /* The other UIMM field in a half word EVX form instruction.  */
+#define EVUIMM_2 EVUIMM + 1
+  { 32, 11, insert_ev2, extract_ev2, PPC_OPERAND_PARENS },
+
+  /* The other UIMM field in a word EVX form instruction.  */
+#define EVUIMM_4 EVUIMM_2 + 1
+  { 32, 11, insert_ev4, extract_ev4, PPC_OPERAND_PARENS },
+
+  /* The other UIMM field in a double EVX form instruction.  */
+#define EVUIMM_8 EVUIMM_4 + 1
+  { 32, 11, insert_ev8, extract_ev8, PPC_OPERAND_PARENS },
+
+  /* The WS field.  */
+#define WS EVUIMM_8 + 1
+#define WS_MASK (0x7 << 11)
+  { 3, 11, 0, 0, 0 },
+
+  /* The L field in an mtmsrd instruction */
+#define MTMSRD_L WS + 1
+  { 1, 16, 0, 0, PPC_OPERAND_OPTIONAL },
+
};

/* The functions used to insert and extract complicated operands.  */
@@ -675,6 +707,63 @@
   return value & 0x1e;
}

+static unsigned long
+insert_ev2 (unsigned long insn,
+     long value,
+     const char **errmsg)
+{
+  if ((value & 1) != 0)
+    *errmsg = _("offset not a multiple of 2");
+  if ((value > 62) != 0)
+    *errmsg = _("offset greater than 62");
+  return insn | ((value & 0x3e) << 10);
+}
+
+static long
+extract_ev2 (unsigned long insn,
+      int *invalid ATTRIBUTE_UNUSED)
+{
+  return (insn >> 10) & 0x3e;
+}
+
+static unsigned long
+insert_ev4 (unsigned long insn,
+     long value,
+     const char **errmsg)
+{
+  if ((value & 3) != 0)
+    *errmsg = _("offset not a multiple of 4");
+  if ((value > 124) != 0)
+    *errmsg = _("offset greater than 124");
+  return insn | ((value & 0x7c) << 9);
+}
+
+static long
+extract_ev4 (unsigned long insn,
+      int *invalid ATTRIBUTE_UNUSED)
+{
+  return (insn >> 9) & 0x7c;
+}
+
+static unsigned long
+insert_ev8 (unsigned long insn,
+     long value,
+     const char **errmsg)
+{
+  if ((value & 7) != 0)
+    *errmsg = _("offset not a multiple of 8");
+  if ((value > 248) != 0)
+    *errmsg = _("offset greater than 248");
+  return insn | ((value & 0xf8) << 8);
+}
+
+static long
+extract_ev8 (unsigned long insn,
+      int *invalid ATTRIBUTE_UNUSED)
+{
+  return (insn >> 8) & 0xf8;
+}
+
/* The DS field in a DS form instruction.  This is like D, but the
    lower two bits are forced to zero.  */

@@ -1184,6 +1273,9 @@
/* An X_MASK with the RA and RB fields fixed.  */
#define XRARB_MASK (X_MASK | RA_MASK | RB_MASK)

+/* An XRARB_MASK, but with the L bit clear.  */
+#define XRLARB_MASK (XRARB_MASK & ~((unsigned long) 1 << 16))
+
/* An X_MASK with the RT and RA fields fixed.  */
#define XRTRA_MASK (X_MASK | RT_MASK | RA_MASK)

@@ -2536,7 +2628,7 @@

{ "wrteei",  X(31,163), XE_MASK, PPC403, { E } },

-{ "mtmsrd",  X(31,178), XRARB_MASK, PPC64, { RS } },
+{ "mtmsrd",  X(31,178), XRLARB_MASK, PPC64, { RS, MTMSRD_L } },

{ "stdux",   X(31,181), X_MASK, PPC64, { RS, RAS, RB } },


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