Broken LPAR cpu bringup

[Dave Hansen]

On Thu, 2004-07-15 at 15:43, Dave Hansen wrote:
> On Thu, 2004-07-15 at 15:39, Nathan Lynch wrote:
> > On Wed, 2004-07-14 at 23:29, Nathan Lynch wrote:
> > > Does this fix it?  The problem is that ppc64 doesn't know about
> > > cpu_present_map.  The arch-independent code copies cpu_possible_map to
> > > cpu_present_map if the latter has not been modified by the arch bootup
> > > code -- as you have discovered, this breaks on LPAR.
> >
> > Well, that's not the only problem, it seems.  With this one on top of
> > the previous patch, does it work?  I have tested it on a similar
> > configuration, but not Power4.
>
> They still get stuck on my tree.  I'll try on a plain tree in a little
> bit.

Nope, still oopses in the load_balance sched domains code:

cpu 0x1: Vector: 380 (Data SLB Access) at [c00000000ca8b420]
    pc: c000000000046644: .find_busiest_group+0x24c/0x470
    lr: c00000000004681c: .find_busiest_group+0x424/0x470
    sp: c00000000ca8b6a0
   msr: 8000000000001032
   dar: 10
  current = 0xc00000000ca80da0
  paca    = 0xc00000000033c900
    pid   = 0, comm = swapper

1:mon> t
[c00000000ca8b7c0] c0000000000469c4 .load_balance+0x5c/0x1c4
[c00000000ca8b880] c000000000046f6c .rebalance_tick+0x120/0x144
[c00000000ca8b930] c000000000057324 .update_process_times+0x44/0x60
[c00000000ca8b9c0] c000000000036f18 .smp_local_timer_interrupt+0x40/0x50
[c00000000ca8ba30] c000000000013050 .timer_interrupt+0xf4/0x394
[c00000000ca8bb10] c00000000000a2b4 Decrementer_common+0xb4/0x100
[c00000000ca8be90] c0000000000128d0 .cpu_idle+0x2c/0x44
[c00000000ca8bf00] c0u 0x0: :  .start_secondaryy+0xd8/0x11c

I wonder if the sched domains didn't get set up correctly.

-- Dave


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