[0/4] RFC: SLB rewrite
David Gibson
david at gibson.dropbear.id.au
Wed Jul 7 16:06:26 EST 2004
Here, at long last, the much awaited, SLB rewrite!
I have this in four patches at the moment:
1/4: slbrewrite2 - The guts of the rewrite, miss path in asm
2/4: noprolog - Unify do_slb_bolted with full SLB miss path
3/4: customentryexit - Optimise SLB exception entry/exit path
4/4: newvsid - Replace VSID algorithm with a better one
Overall these seem to improve the (user address) SLB miss time by
around 25% (200ns to 150ns on a G5). Test program and resulting
graphs are at http://www.ozlabs.org/people/dgibson/slbtest/ the most
interesting graph is probably:
http://www.ozlabs.org/people/dgibson/slbtest/stagger.png
These patches have been tested (though not extensively) on an Apple G5
(PowerPC 970), a p630 LPAR (Power4+), an RS/6000 270 (POWER3) and an
RS64 iSeries partition (the latter two obviously aren't expected to
show any improvement, the point is just to check I haven't broken
things dramatically for STAB machines). Anton has also tested some
earlier versions of the rewrite on a Power5 (bare metal Linux).
If there are no serious problems, I'm thinking of pushing at least the
first three of these to Linus/akpm in the next week or so.
--
David Gibson | For every complex problem there is a
david AT gibson.dropbear.id.au | solution which is simple, neat and
| wrong.
http://www.ozlabs.org/people/dgibson
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